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author | Kazu Hirata <kazu@cs.umass.edu> | 2004-02-17 14:09:35 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2004-02-17 14:09:35 +0000 |
commit | ef3f573fc8c6b34fff01fb93d9dd760d7d2318d3 (patch) | |
tree | 97b9a30e4f04f4b684c173ebedd013aed9a3e6a9 /gcc | |
parent | 6d4925e368e2d16f276317788fa797ed43b74cfe (diff) | |
download | gcc-ef3f573fc8c6b34fff01fb93d9dd760d7d2318d3.zip gcc-ef3f573fc8c6b34fff01fb93d9dd760d7d2318d3.tar.gz gcc-ef3f573fc8c6b34fff01fb93d9dd760d7d2318d3.tar.bz2 |
h8300.h (FIXED_REGISTERS): Add the soft frame pointer.
* config/h8300/h8300.h (FIXED_REGISTERS): Add the soft frame
pointer.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(REG_CLASS) <GENERAL_REGS>: Likewise.
From-SVN: r77949
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/h8300/h8300.h | 19 |
2 files changed, 19 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c4f3ec6..795460c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2004-02-17 Kazu Hirata <kazu@cs.umass.edu> + + * config/h8300/h8300.h (FIXED_REGISTERS): Add the soft frame + pointer. + (CALL_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (REG_CLASS) <GENERAL_REGS>: Likewise. + 2004-02-16 Geoffrey Keating <geoffk@apple.com> * doc/md.texi (Insn Canonicalizations): Document left-chaining diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index 1b3d6ee..52b3a70 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -288,8 +288,9 @@ extern int target_flags; /* 1 for registers that have pervasive standard uses and are not available for the register allocator. */ -#define FIXED_REGISTERS \ - { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1} +#define FIXED_REGISTERS \ +/* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ + { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1 } /* 1 for registers not available across function calls. These must include the FIXED_REGISTERS and also any @@ -301,11 +302,13 @@ extern int target_flags; H8 destroys r0,r1,r2,r3. */ -#define CALL_USED_REGISTERS \ - { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 } +#define CALL_USED_REGISTERS \ +/* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ + { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1 } -#define REG_ALLOC_ORDER \ - { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10} +#define REG_ALLOC_ORDER \ +/* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \ + { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11 } #define CONDITIONAL_REGISTER_USAGE \ { \ @@ -429,9 +432,9 @@ enum reg_class { #define REG_CLASS_CONTENTS \ { {0}, /* No regs */ \ - {0x6ff}, /* GENERAL_REGS */ \ + {0xeff}, /* GENERAL_REGS */ \ {0x100}, /* MAC_REGS */ \ - {0x7ff}, /* ALL_REGS */ \ + {0xfff}, /* ALL_REGS */ \ } /* The same information, inverted: |