h8300.md: Remove "type" attribute from all patterns except those which have varying...

        * h8300/h8300.md: Remove "type" attribute from all patterns
        except those which have varying length branches.  Eliminate
        obsolete "type" attributes.  Add additional comments about insn
        length computation problems and further optimizations.  Add
        "length" and "cc" attributes to insns without them, fix a few
        length computations.  Remove patterns which are commented out.

        * h8300/h8300.md (zero extension expanders and insns): Simplify,
        fix various length problems, provide optimized versions for the
        h8300 and h8300h.
        (sign extension expanders and insns): Likewise.  Make them
        nearly identical to zero_extension patterns and insns.

From-SVN: r11849

1 files changed, 236 insertions, 276 deletions

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 4c8f512..c177990 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -52,9 +52,19 @@
 ;; bit is going to be operated on.
 
 ;; Should be HI & SImode tstXX insns which test one bit using btst.
+;;
+;; Some insns allow general operations, but lengths don't take
+;; into account that a general operand may be a memory reference
+;; with a long length.  (EXTEND insns)
+
+;; On the h8300h, adds/subs operate on the 32bit "er" registers.  Right
+;; now GCC doesn't expose the "e" half to the compiler, so using add/subs
+;; for addhi and subhi is safe.
+;; Long term, we want to expose the "e" half to the compiler (gives us
+;; 8 more 16bit registers).  At that point addhi and subhi can't use adds/subs.
 
 
-(define_attr "type" "branch,bcs,return,call,arith,move,float,multi"
+(define_attr "type" "branch,bcs,arith"
   (const_string "arith"))
 
 ;; The size of instructions in bytes.
@@ -94,11 +104,7 @@
 				     (if_then_else
 				       (match_operand 2 "register_operand" "")
 				       (const_int 8)
-				       (const_int 10))))
-	 (eq_attr "type" "move")	(const_int 4)
-	 (eq_attr "type" "return")	(const_int 2)
-	 (eq_attr "type" "float")	(const_int 12)
-	 (eq_attr "type" "call")	(const_int 4)]
+				       (const_int 10))))]
 	(const_int 200)))
 
 ;; Condition code settings.
@@ -132,8 +138,7 @@
   else
     return \"push.l	%S1\";
 }"
-  [(set_attr "type" "move")
-   (set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
+  [(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
    (set_attr "cc" "set")])
 
 (define_insn "movqi_internal"
@@ -147,8 +152,7 @@
    mov.b	%X1,%R0
    mov.b	%R1,%X0
    mov.b	%X1,%R0"
-  [(set_attr "type" "move")
-   (set_attr_alternative "length"
+  [(set_attr_alternative "length"
      [(const_int 2) (const_int 2) (const_int 2)
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
@@ -176,8 +180,7 @@
    sub.b	%X0,%X0
    mov.b	%X1,%X0
    mov.b	%R1,%X0"
-  [(set_attr "type" "move")
-   (set_attr_alternative "length"
+  [(set_attr_alternative "length"
      [(const_int 2) (const_int 2)
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
    (set_attr "cc" "set_zn_c0,set,set")])
@@ -197,8 +200,7 @@
   else
     return \"push.l	%S1\";
 }"
-  [(set_attr "type" "move")
-   (set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
+  [(set (attr "length") (if_then_else (eq_attr "cpu" "h8300") (const_int 2) (const_int 4)))
    (set_attr "cc" "set")])
 
 (define_insn "movhi_internal"
@@ -212,8 +214,7 @@
    mov.w	%T1,%T0
    mov.w	%T1,%T0
    mov.w	%T1,%T0"
-  [(set_attr "type" "move")
-   (set_attr_alternative "length"
+  [(set_attr_alternative "length"
      [(const_int 2) (const_int 2) (const_int 2)
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
@@ -241,8 +242,7 @@
    sub.w	%T0,%T0
    mov.w	%T1,%T0
    mov.w	%T1,%T0"
-  [(set_attr "type" "move")
-   (set_attr_alternative "length"
+  [(set_attr_alternative "length"
      [(const_int 2) (const_int 2)
       (if_then_else (eq_attr "cpu" "h8300") (const_int 4) (const_int 8))])
    (set_attr "cc" "set_zn_c0,set,set")])
@@ -355,8 +355,7 @@
       return \"mov.w	%T1,%e0\;mov.w	%T1,%f0\";
     }
 }"
-  [(set_attr "type" "move")
-   (set_attr "length" "4,4,8,8,4,4")
+  [(set_attr "length" "4,4,8,8,4,4")
    (set_attr "cc" "clobber")])
 
 (define_insn "movsf_h8300"
@@ -415,8 +414,7 @@
 
     }
 }"
-  [(set_attr "type" "move")
-   (set_attr "length" "4,4,8,8,4,4")
+  [(set_attr "length" "4,4,8,8,4,4")
    (set_attr "cc" "clobber")])
 
 (define_insn "movsi_h8300h"
@@ -457,8 +455,7 @@
     }
    return \"mov.l	%S1,%S0\";
 }"
-  [(set_attr "type" "move")
-   (set_attr "length" "2,2,10,10,4,4")
+  [(set_attr "length" "2,2,10,10,4,4")
    (set_attr "cc" "set_zn_c0,set,set,set,set,set")])
 
 (define_insn "movsf_h8300h"
@@ -474,8 +471,7 @@
    mov.l	%S1,%S0
    mov.l	%S1,%S0
    mov.l	%S1,%S0"
-  [(set_attr "type" "move")
-   (set_attr "length" "2,2,10,10,4,4")
+  [(set_attr "length" "2,2,10,10,4,4")
    (set_attr "cc" "set_zn_c0,set,set,set,set,set")])
 
 ;; ----------------------------------------------------------------------
@@ -487,32 +483,28 @@
 		      (match_operand:QI 1 "o_operand" "O")))]
   ""
   "btst %W1,%R0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
   
 (define_insn "tstqi"
   [(set (cc0) (match_operand:QI 0 "general_operand" "ra"))]
   ""
   "mov.b	%X0,%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set")])
 
 (define_insn "tsthi"
   [(set (cc0) (match_operand:HI 0 "general_operand" "ra"))]
   ""
   "mov.w	%T0,%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set")])
 
 (define_insn "tstsi"
   [(set (cc0) (match_operand:SI 0 "general_operand" "ra"))]
   "TARGET_H8300H"
   "mov.l	%S0,%S0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set")])
 
 (define_insn "cmpqi"
@@ -521,8 +513,7 @@
 		    (match_operand:QI 1 "nonmemory_operand" "rai")))]
   ""
   "cmp.b	%X1,%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "compare")])
 
 (define_expand "cmphi"
@@ -544,8 +535,7 @@
 		    (match_operand:HI 1 "register_operand" "ra")))]
   "!TARGET_H8300H"
   "cmp.w	%T1,%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "compare")])
 
 (define_insn ""
@@ -554,8 +544,7 @@
 		    (match_operand:HI 1 "nonmemory_operand" "rai")))]
   "TARGET_H8300H"
   "cmp.w	%T1,%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "compare")])
 
 (define_insn "cmpsi"
@@ -564,8 +553,7 @@
 		    (match_operand:SI 1 "nonmemory_operand" "rai")))]
   "TARGET_H8300H"
   "cmp.l	%S1,%S0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "compare")])
 
 ;; ----------------------------------------------------------------------
@@ -578,13 +566,9 @@
 		 (match_operand:QI 2 "nonmemory_operand" "ri")))]
   ""
   "add.b	%X2,%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
 
-;; h8300h: adds operates on the 32bit register.  We can use it because we don't
-;; use the e0-7 registers.
-
 (define_expand "addhi3"
   [(set (match_operand:HI 0 "register_operand" "")
 	(plus:HI (match_operand:HI 1 "register_operand" "")
@@ -600,8 +584,7 @@
 		 (match_operand:HI 2 "adds_subs_operand" "i")))]
   ""
   "* return output_adds_subs (operands);"
-  [(set_attr "type" "arith")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "none_0hit")])
 
 (define_insn ""
@@ -612,8 +595,7 @@
   "@
    add.b	%s2,%s0\;addx	%t2,%t0 
    add.w	%T2,%T0"
-  [(set_attr "type" "multi,arith")
-   (set_attr "length" "4,2")
+  [(set_attr "length" "4,2")
    (set_attr "cc" "clobber,set_zn_c0")])
 
 (define_insn ""
@@ -624,8 +606,7 @@
   "@
    add.w	%T2,%T0
    add.w	%T2,%T0"
-  [(set_attr "type" "arith,arith")
-   (set_attr "length" "4,2")
+  [(set_attr "length" "4,2")
    (set_attr "cc" "set_zn_c0,set_zn_c0")])
 
 (define_expand "addsi3"
@@ -643,8 +624,7 @@
 		 (match_operand:SI 2 "adds_subs_operand" "i")))]
   "TARGET_H8300H"
   "* return output_adds_subs (operands);"
-  [(set_attr "type" "arith")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "none_0hit")])
 
 (define_insn "addsi_h8300"
@@ -656,8 +636,7 @@
    add	%w2,%w0\;addx	%x2,%x0\;addx	%y2,%y0\;addx	%z2,%z0
    add.w	%f2,%f0\;addx	%y2,%y0\;addx	%z2,%z0
    mov	%f1,%f0\;mov	%e1,%e0\;add.w	%f2,%f0\;addx	%y2,%y0\;addx	%z2,%z0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "8,6,20")
+  [(set_attr "length" "8,6,20")
    (set_attr "cc" "clobber")])
 
 (define_insn "addsi_h8300h"
@@ -668,8 +647,7 @@
   "@
    add.l	%S2,%S0
    add.l	%S2,%S0"
-  [(set_attr "type" "arith,arith")
-   (set_attr "length" "6,2")
+  [(set_attr "length" "6,2")
    (set_attr "cc" "set_zn_c0,set_zn_c0")])
 
 ;; ----------------------------------------------------------------------
@@ -684,13 +662,9 @@
   "@
    sub.b	%X2,%X0
    add.b	%G2,%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
 
-;; h8300h: subs operates on the 32bit register.  We can use it because we don't
-;; use the e0-7 registers.
-
 (define_expand "subhi3"
   [(set (match_operand:HI 0 "register_operand" "")
 	(minus:HI (match_operand:HI 1 "general_operand" "")
@@ -711,8 +685,7 @@
   operands[2] = GEN_INT (-INTVAL (operands[2]));
   return output_adds_subs (operands);
 }"
-  [(set_attr "type" "arith")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "none_0hit")])
 
 (define_insn ""
@@ -723,8 +696,7 @@
   "@
    sub.w	%T2,%T0
    add.b	%E2,%s0\;addx	%F2,%t0 ; -%0"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "set_zn_c0,clobber")])
 
 (define_insn ""
@@ -735,8 +707,7 @@
   "@
    sub.w	%T2,%T0
    sub.w	%T2,%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "set_zn_c0,set_zn_c0")])
 
 (define_expand "subsi3"
@@ -752,8 +723,7 @@
 		  (match_operand:SI 2 "register_operand" "r")))]
   "TARGET_H8300"
   "sub.w	%f2,%f0\;subx	%y2,%y0\;subx	%z2,%z0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "6")
+  [(set_attr "length" "6")
    (set_attr "cc" "clobber")])
 
 ;; Specialized version using adds/subs.  This must come before
@@ -769,8 +739,7 @@
   operands[2] = GEN_INT (-INTVAL (operands[2]));
   return output_adds_subs (operands);
 }"
-  [(set_attr "type" "arith")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "none_0hit")])
 
 (define_insn "subsi3_h8300h"
@@ -781,8 +750,7 @@
   "@
    sub.l	%S2,%S0
    sub.l	%S2,%S0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2,6")
+  [(set_attr "length" "2,6")
    (set_attr "cc" "set_zn_c0,set_zn_c0")])
 
 ;; ----------------------------------------------------------------------
@@ -797,8 +765,7 @@
 		 (sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   "TARGET_H8300H"
   "mulxs.b	%X2,%T0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "set_zn_c0")])
 
 (define_insn "mulhisi3"
@@ -807,8 +774,7 @@
 		 (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_H8300H"
   "mulxs.w	%T2,%S0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "set_zn_c0")])
 
 (define_insn "umulqihi3"
@@ -817,8 +783,7 @@
 		 (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
   ""
   "mulxu	%X2,%T0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "none_0hit")])
 
 (define_insn "umulhisi3"
@@ -827,8 +792,7 @@
 		 (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
   "TARGET_H8300H"
   "mulxu.w	%T2,%S0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "none_0hit")])
 
 ;; ----------------------------------------------------------------------
@@ -841,8 +805,7 @@
 		 (match_operand:QI 2 "register_operand" "r")))]
   ""
   "divxu	%X2,%T0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "clobber")])
 
 ;; ??? Will divxu always work here?
@@ -853,8 +816,7 @@
 		(match_operand:QI 2 "register_operand" "r")))]
   ""
   "divxu	%X2,%T0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "clobber")])
 
 (define_insn "udivhi3"
@@ -863,8 +825,7 @@
 		 (match_operand:HI 2 "register_operand" "r")))]
   "TARGET_H8300H"
   "divxu.w	%T2,%S0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "clobber")])
 
 (define_insn "divhi3"
@@ -873,8 +834,7 @@
 		(match_operand:HI 2 "register_operand" "r")))]
   "TARGET_H8300H"
   "divxs.w	%T2,%S0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "clobber")])
 
 ;; ----------------------------------------------------------------------
@@ -887,8 +847,7 @@
 		 (match_operand:QI 2 "register_operand" "r")))]
   ""
   "divxu	%X2,%T0\;mov %t0,%s0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "clobber")])
 
 (define_insn "modqi3"
@@ -897,8 +856,7 @@
 		(match_operand:QI 2 "register_operand" "r")))]
   "TARGET_H8300H"
   "divxs.b	%X2,%T0\;mov %t0,%s0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "6")
+  [(set_attr "length" "6")
    (set_attr "cc" "clobber")])
 
 (define_insn "umodhi3"
@@ -907,8 +865,7 @@
 		 (match_operand:HI 2 "register_operand" "r")))]
   "TARGET_H8300H"
   "divxu.w	%T2,%S0\;mov %e0,%f0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "clobber")])
 
 (define_insn "modhi3"
@@ -917,8 +874,7 @@
 		(match_operand:HI 2 "register_operand" "r")))]
   "TARGET_H8300H"
   "divxs.w	%T2,%S0\;mov %e0,%f0"
-  [(set_attr "type" "multi")
-   (set_attr "length" "6")
+  [(set_attr "length" "6")
    (set_attr "cc" "clobber")])
 
 ;; ----------------------------------------------------------------------
@@ -933,8 +889,7 @@
   "@
    and	%X2,%X0
    bclr	%W2,%R0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "set,none_0hit")])
 
 (define_expand "andqi3"
@@ -969,8 +924,7 @@
     return \"and.w %T2,%T0\";
   return \"and	%s2,%s0\;and	%t2,%t0;\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "clobber,clobber")])
 
 (define_insn "andsi3"
@@ -1009,8 +963,7 @@
     return \"and.l	%S2,%S0\";
   return \"and	%w2,%w0\;and	%x2,%x0\;and	%y2,%y0\;and	%z2,%z0\;\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,8")
+  [(set_attr "length" "2,8")
    (set_attr "cc" "clobber,clobber")])
 
 ;; ----------------------------------------------------------------------
@@ -1025,8 +978,7 @@
   "@
    or	%X2,%X0
    bset	%V2,%R0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "set,none_0hit")])
 
 (define_expand "iorqi3"
@@ -1061,8 +1013,7 @@
     return \"or.w	%T2,%T0\";
   return \"or	%s2,%s0\;or	%t2,%t0; %2 or2\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "clobber,clobber")])
 
 (define_insn "iorsi3"
@@ -1098,8 +1049,7 @@
     return \"or.l	%S2,%S0\";
   return \"or	%w2,%w0\;or	%x2,%x0\;or	%y2,%y0\;or	%z2,%z0\;\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,8")
+  [(set_attr "length" "2,8")
    (set_attr "cc" "clobber,clobber")])
 
 ;; ----------------------------------------------------------------------
@@ -1114,8 +1064,7 @@
   "@
    xor	%X2,%X0
    bnot	%V2,%R0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "set,none_0hit")])
 
 (define_expand "xorqi3"
@@ -1150,8 +1099,7 @@
     return \"xor.w	%T2,%T0\";
   return \"xor	%s2,%s0\;xor	%t2,%t0\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,4")
+  [(set_attr "length" "2,4")
    (set_attr "cc" "clobber,clobber")])
 
 (define_insn "xorsi3"
@@ -1187,8 +1135,7 @@
     return \"xor.l	%S2,%S0\";
   return \"xor	%w2,%w0\;xor	%x2,%x0\;xor	%y2,%y0\;xor	%z2,%z0\;\";
 }"
-  [(set_attr "type" "arith,multi")
-   (set_attr "length" "2,8")
+  [(set_attr "length" "2,8")
    (set_attr "cc" "clobber,clobber")])
 
 ;; ----------------------------------------------------------------------
@@ -1200,8 +1147,7 @@
 	(neg:QI (match_operand:QI 1 "general_operand" "0")))]
   ""
   "neg	%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
 
 (define_expand "neghi2"
@@ -1231,8 +1177,7 @@
 	(neg:HI (match_operand:HI 1 "general_operand" "0")))]
   "TARGET_H8300H"
   "neg	%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
 
 (define_expand "negsi2"
@@ -1262,8 +1207,7 @@
 	(neg:SI (match_operand:SI 1 "general_operand" "0")))]
   "TARGET_H8300H"
   "neg	%S0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set_zn_c0")])
 
 ;; ----------------------------------------------------------------------
@@ -1275,8 +1219,7 @@
 	(not:QI (match_operand:QI 1 "general_operand" "0")))]
   ""
   "not	%X0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "2")
+  [(set_attr "length" "2")
    (set_attr "cc" "set")])
 
 (define_insn "one_cmplhi2"
@@ -1290,8 +1233,7 @@
   else
     return \"not	%T0\";
 }"
-  [(set_attr "type" "arith")
-   (set_attr "cc" "clobber")
+  [(set_attr "cc" "clobber")
    (set (attr "length")
 	(if_then_else (eq (symbol_ref "TARGET_H8300H") (const_int 0))
 		      (const_int 8)
@@ -1308,8 +1250,7 @@
   else
     return \"not	%S0\";
 }"
-  [(set_attr "type" "arith")
-   (set_attr "cc" "clobber")
+  [(set_attr "cc" "clobber")
    (set (attr "length")
 	(if_then_else (eq (symbol_ref "TARGET_H8300H") (const_int 0))
 		      (const_int 8)
@@ -1491,8 +1432,7 @@
    (use (label_ref (match_operand 1 "" "")))]
   "TARGET_H8300"
   "jmp	@%0"
-  [(set_attr "type" "branch")
-   (set_attr "cc" "none")
+  [(set_attr "cc" "none")
    (set_attr "length" "2")])
 
 (define_insn "tablejump_h8300h"
@@ -1500,8 +1440,7 @@
    (use (label_ref (match_operand 1 "" "")))]
   "TARGET_H8300H"
   "jmp	@%0"
-  [(set_attr "type" "branch")
-   (set_attr "cc" "none")
+  [(set_attr "cc" "none")
    (set_attr "length" "2")])
 
 ;; This is a define expand, because pointers may be either 16 or 32 bits.
@@ -1517,8 +1456,7 @@
   "@
    jmp	@%0
    jmp	@%0"
-  [(set_attr "type" "branch")
-   (set_attr "cc" "none")
+  [(set_attr "cc" "none")
    (set_attr "length" "2")])
 
 (define_insn "indirect_jump_h8300h"
@@ -1527,8 +1465,7 @@
   "@
    jmp @%0
    jmp @%0"
-  [(set_attr "type" "branch")
-   (set_attr "cc" "none")
+  [(set_attr "cc" "none")
    (set_attr "length" "2")])
 
 ;; Call subroutine with no return value.
@@ -1547,8 +1484,7 @@
   else
     return \"jsr\\t%0\";
 }"
-  [(set_attr "type" "call")
-   (set_attr "cc" "clobber")
+  [(set_attr "cc" "clobber")
    (set (attr "length")
      (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
 		   (const_int 4)
@@ -1572,8 +1508,7 @@
   else
     return \"jsr\\t%1\";
 }"
-  [(set_attr "type" "call")
-   (set_attr "cc" "clobber")
+  [(set_attr "cc" "clobber")
    (set (attr "length")
      (if_then_else (match_operand:QI 0 "small_call_insn_operand" "")
 		   (const_int 4)
@@ -1583,8 +1518,7 @@
   [(const_int 0)]
   ""
   "nop"
-  [(set_attr "type" "multi")
-   (set_attr "cc" "none")
+  [(set_attr "cc" "none")
    (set_attr "length" "2")])
 
 ;; ----------------------------------------------------------------------
@@ -1595,71 +1529,81 @@
   [(set (match_operand:HI 0 "register_operand" "=r,r")
 	(zero_extend:HI (match_operand:QI 1 "general_operand" "0,g")))]
   ""
-  "*
-{
-  if (which_alternative==0)
-    return \"mov.b	#0,%t0\";
+  "@
+  mov.b	#0,%t0
+  mov.b	%R1,%s0\;mov.b	#0,%t0"
+  [(set_attr "length" "2,4")
+   (set_attr "cc" "clobber,clobber")])
 
-  if (TARGET_H8300)
-    return \"mov.b	%R1,%s0\;mov.b	#0,%t0\";
-  else
+(define_expand "zero_extendhisi2"
+  [(set (match_operand:SI 0 "register_operand" "")
+	(zero_extend:SI (match_operand:HI 1 "general_operand" "")))]
+  ""
+  "
+{
+  if (TARGET_H8300
+      && GET_CODE (operands[1]) != CONST_INT)
     {
-      /* ??? See how often this gets optimized.  */
-      if (REG_P (operands[1]) && (REGNO (operands[1]) == REGNO (operands[0])))
-	return \"extu.w	%T0\";
-      else
-	return \"mov.b	%R1,%s0\;extu.w	%T0\";
+      emit_insn (gen_zero_extendhisi2_h8300 (operands[0], operands[1]));
+      DONE;
     }
-}"
-  [(set_attr "type" "multi")
-;; ??? This length is wrong for one case.
-   (set_attr "length" "4")
-   (set_attr "cc" "clobber")])
+}")
 
-(define_insn "zero_extendhisi2"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-	(zero_extend:SI (match_operand:HI 1 "general_operand" "g")))]
+;; I don't know why, but if I try to simplify extendhisi2 in the
+;; natural way, I get about a 2X code bloat on the h8300 without
+;; optimization, and a small bloat with optimization.  Weird.
+(define_expand "zero_extendhisi2_h8300"
+  [(set (reg:HI 1) (match_operand:HI 1 "general_operand" ""))
+   (set (reg:SI 0) (zero_extend:SI (reg:HI 1)))
+   (set (match_operand:SI 0 "general_operand" "" ) (reg:SI 0))]
+  "TARGET_H8300"
+  "")
+
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(zero_extend:SI (match_operand:HI 1 "general_operand" "0,g")))]
+  "TARGET_H8300"
+  "@
+  sub.w	%e0,%e0
+  mov.w %e1,%f0\;sub.w %e0,%e0"
+  [(set_attr "length" "2,4")
+   (set_attr "cc" "clobber,clobber")])
+
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(zero_extend:SI (match_operand:HI 1 "general_operand" "0,g")))]
   "TARGET_H8300H"
-  "*
-{
-  /* ??? See how often this gets optimized.  */
-  if (REG_P (operands[1]) && (REGNO (operands[1]) == REGNO (operands[0])))
-    return \"extu.l	%S0\";
-  else
-    return \"mov.w	%T1,%T0\;extu.l	%S0\";
-}"
-  [(set_attr "type" "multi")
-;; ??? This length is wrong for one case.
-   (set_attr "length" "4")
-   (set_attr "cc" "clobber")])
+  "@
+  extu.l	%S0
+  mov.w	%T1,%T0\;extu.l	%S0"
+  [(set_attr "length" "2,4")
+   (set_attr "cc" "set,set")])
 
-(define_insn "extendqihi2"
-  [(set (match_operand:HI 0 "register_operand" "=r")
-	(sign_extend:HI (match_operand:QI 1 "general_operand" "g")))]
+(define_expand "extendqihi2"
+  [(set (match_operand:HI 0 "register_operand" "")
+	(sign_extend:HI (match_operand:QI 1 "general_operand" "")))]
   ""
-  "*
-{
-  if (TARGET_H8300)
-    {
-      /* ??? See how often this gets optimized.  */
-      if (REG_P (operands[1]) && (REGNO (operands[1]) == REGNO (operands[0])))
-	return \"bld	#7,%s0\;subx	%t0,%t0\";
-      else
-	return \"mov.b	%R1,%s0\;bld	#7,%s0\;subx	%t0,%t0\";
-    }
-  else
-    {
-      /* ??? See how often this gets optimized.  */
-      if (REG_P (operands[1]) && (REGNO (operands[1]) == REGNO (operands[0])))
-	return \"exts.w	%T0\";
-      else
-	return \"mov.b	%R1,%s0\;exts.w	%T0\";
-    }
-}"
-  [(set_attr "type" "multi")
-;; ??? Length is wrong in some cases.
-   (set_attr "length" "6")
-   (set_attr "cc" "clobber")])
+  "")
+
+(define_insn ""
+  [(set (match_operand:HI 0 "register_operand" "=r,r")
+	(sign_extend:HI (match_operand:QI 1 "general_operand" "0,g")))]
+  "TARGET_H8300"
+  "@
+  bld	#7,%s0\;subx	%t0,%t0
+  mov.b	%R1,%s0\;bld	#7,%s0\;subx	%t0,%t0"
+  [(set_attr "length" "4,6")
+   (set_attr "cc" "clobber,clobber")])
+
+(define_insn ""
+  [(set (match_operand:HI 0 "register_operand" "=r,r")
+	(sign_extend:HI (match_operand:QI 1 "general_operand" "0,g")))]
+  "TARGET_H8300H"
+  "@
+  exts.w	%T0
+  mov.b	%R1,%s0\;exts.w	%T0"
+  [(set_attr "length" "2,4")
+   (set_attr "cc" "set,set")])
 
 (define_expand "extendhisi2"
   [(set (match_operand:SI 0 "register_operand" "")
@@ -1667,13 +1611,17 @@
   ""
   "
 {
-  if (TARGET_H8300)
-    emit_insn (gen_extendhisi2_h8300 (operands[0], operands[1]));
-  else
-    emit_insn (gen_extendhisi2_h8300h (operands[0], operands[1]));
-  DONE;
+  if (TARGET_H8300
+      && GET_CODE (operands[1]) != CONST_INT)
+    {
+      emit_insn (gen_extendhisi2_h8300 (operands[0], operands[1]));
+      DONE;
+    }
 }")
 
+;; I don't know why, but if I try to simplify extendhisi2 in the
+;; natural way, I get about a 2X code bloat on the h8300 without
+;; optimization, and a small bloat with optimization.  Weird.
 (define_expand "extendhisi2_h8300"
   [(set (reg:HI 1) (match_operand:HI 1 "general_operand" ""))
    (set (reg:SI 0) (sign_extend:SI (reg:HI 1)))
@@ -1681,34 +1629,25 @@
   "TARGET_H8300"
   "")
 
-(define_expand "extendhisi2_h8300h"
-  [(set (match_operand:SI 0 "register_operand" "")
-	(sign_extend:SI (match_operand:HI 1 "general_operand" "")))]
-  "TARGET_H8300H"
-  "")
-
-(define_insn "extendhisi2_h8300_internal"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-	(sign_extend:SI (match_operand:HI 1 "register_operand" "0")))]
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(sign_extend:SI (match_operand:HI 1 "general_operand" "0,g")))]
   "TARGET_H8300"
-  "mov.w	%T1,%f0\;bld	#7,%x0\;subx	%y0,%y0\;subx	%z0,%z0"
-  [(set_attr "length" "10")
-   (set_attr "cc" "clobber")])
+  "@
+  bld	#7,%x0\;subx	%y0,%y0\;subx	%z0,%z0
+  mov.w	%T1,%f0\;bld	#7,%x0\;subx	%y0,%y0\;subx	%z0,%z0"
+  [(set_attr "length" "6,8")
+   (set_attr "cc" "clobber,clobber")])
 
-(define_insn "extendhisi2_h8300h_internal"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-	(sign_extend:SI (match_operand:HI 1 "general_operand" "g")))]
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=r,r")
+	(sign_extend:SI (match_operand:HI 1 "general_operand" "0,g")))]
   "TARGET_H8300H"
-  "*
-{
-  /* ??? See how often this gets optimized.  */
-  if (REG_P (operands[1]) && (REGNO (operands[1]) == REGNO (operands[0])))
-    return \"exts.l	%S0\";
-  else
-    return \"mov.w	%T1,%T0\;exts.l	%S0\";
-}"
-  [(set_attr "length" "10")
-   (set_attr "cc" "clobber")])
+  "@
+  exts.l	%S0
+  mov.w	%T1,%T0\;exts.l	%S0"
+  [(set_attr "length" "2,4")
+   (set_attr "cc" "set,set")])
 
 ;; ----------------------------------------------------------------------
 ;; SHIFTS
@@ -1763,8 +1702,7 @@
    (clobber (match_scratch:QI 4 "=X,&r"))]
   ""
   "* return emit_a_shift (insn, operands);"
-  [(set_attr "type" "arith")
-   (set_attr "length" "20")
+  [(set_attr "length" "20")
 ;; ??? We'd like to indicate that cc is set here, and it is for simple shifts.
 ;; However, for cases that loop or are done in pieces, cc does not contain
 ;; what we want.  Emit_a_shift is free to tweak cc_status as desired.
@@ -1804,8 +1742,7 @@
    (clobber (match_scratch:QI 4 "=X,&r"))]
   ""
   "* return emit_a_shift (insn, operands);"
-  [(set_attr "type" "arith")
-   (set_attr "length" "20")
+  [(set_attr "length" "20")
 ;; ??? We'd like to indicate that cc is set here, and it is for simple shifts.
 ;; However, for cases that loop or are done in pieces, cc does not contain
 ;; what we want.  Emit_a_shift is free to tweak cc_status as desired.
@@ -1848,8 +1785,7 @@
    (clobber (match_scratch:QI 4 "=X,&r"))]
   ""
   "* return emit_a_shift (insn, operands);"
-  [(set_attr "type" "arith")
-   (set_attr "length" "20")
+  [(set_attr "length" "20")
 ;; ??? We'd like to indicate that cc is set here, and it is for simple shifts.
 ;; However, for cases that loop or are done in pieces, cc does not contain
 ;; what we want.  Emit_a_shift is free to tweak cc_status as desired.
@@ -1973,7 +1909,9 @@
 			 (const_int 1)
 			 (match_operand:HI 2 "immediate_operand" "i")))]
   ""
-  "sub.w	%0,%0\;bld	%Z2,%Y1\;bst	#0,%X0")
+  "sub.w	%0,%0\;bld	%Z2,%Y1\;bst	#0,%X0"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 (define_insn "extract_1_hi"
   [(set (match_operand:HI 0 "register_operand" "=&r")
@@ -1981,7 +1919,9 @@
 			 (const_int 1)
 			 (match_operand:HI 2 "immediate_operand" "i")))]
   ""
-  "sub.w	%0,%0\;bld	%Z2,%Y1\;bst	#0,%X0")
+  "sub.w	%0,%0\;bld	%Z2,%Y1\;bst	#0,%X0"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 (define_insn "insert_1"
   [(set (zero_extract:HI (match_operand:QI 0 "bit_operand" "+Ur")
@@ -1991,7 +1931,9 @@
 			 (const_int 1)
 			 (const_int 0)))]
   ""
-  "bld	#0,%R2\;bst	%Z1,%Y0 ; i1")
+  "bld	#0,%R2\;bst	%Z1,%Y0 ; i1"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "4")])
 
 ;; This is how combine canonicalizes this pattern.  This is perhaps a bug
 ;; in combine.c, but there is no problem with writing it this way so we do.
@@ -2002,7 +1944,9 @@
 	(lshiftrt:QI (match_operand:QI 2 "bit_operand" "Ur")
 		     (match_operand:HI 3 "immediate_operand" "i")))]
  ""
- "bld	%Z3,%Y2\;bst	%Z1,%Y0; ei1")
+ "bld	%Z3,%Y2\;bst	%Z1,%Y0; ei1"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "4")])
 
 ;; BAND, BOR, and BXOR patterns
 
@@ -2014,7 +1958,9 @@
 			     (match_operand:HI 2 "immediate_operand" "i"))
 	    (match_operand:HI 3 "bit_operand" "0")]))]
   ""
-  "bld	%Z2,%Y1\;%b4	#0,%R0\;bst	#0,%R0; bl1")
+  "bld	%Z2,%Y1\;%b4	#0,%R0\;bst	#0,%R0; bl1"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 (define_insn "bitlogical_1_hi"
   [(set (match_operand:HI 0 "bit_operand" "=Ur")
@@ -2024,7 +1970,9 @@
 			     (match_operand:HI 2 "immediate_operand" "i"))
 	    (match_operand:HI 3 "bit_operand" "0")]))]
   ""
-  "bld	%Z2,%Y1\;%b4	#0,%R0\;bst	#0,%R0; bl2")
+  "bld	%Z2,%Y1\;%b4	#0,%R0\;bst	#0,%R0; bl2"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 (define_insn "bitlogical_2"
   [(set (match_operand:HI 0 "bit_operand" "=Ur")
@@ -2036,7 +1984,9 @@
 			     (const_int 1)
 			     (match_operand:HI 4 "immediate_operand" "i"))]))]
   ""
-  "bld	%Z2,%Y1\;%b5	%Z4,%Y3\;bst	#0,%R0; bl3")
+  "bld	%Z2,%Y1\;%b5	%Z4,%Y3\;bst	#0,%R0; bl3"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 (define_insn "bitlogical_2_hi"
   [(set (match_operand:HI 0 "bit_operand" "=Ur")
@@ -2048,7 +1998,9 @@
 			     (const_int 1)
 			     (match_operand:HI 4 "immediate_operand" "i"))]))]
   ""
-  "bld	%Z2,%Y1\;%b5	%Z4,%Y3\;bst	#0,%R0; bl3")
+  "bld	%Z2,%Y1\;%b5	%Z4,%Y3\;bst	#0,%R0; bl3"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 
 ;; This is how combine canonicalizes this pattern.  This is perhaps a bug
 ;; in combine.c, but there is no problem with writing it this way so we do.
@@ -2062,7 +2014,9 @@
 	    (lshiftrt:QI (match_operand:QI 4 "bit_operand" "Ur")
 			 (match_operand:HI 5 "immediate_operand" "i"))]))]
   ""
-  "bld	%Z3,%Y2\;%b6	%Z5,%Y4\;bst	%Z1,%Y0; bl5")
+  "bld	%Z3,%Y2\;%b6	%Z5,%Y4\;bst	%Z1,%Y0; bl5"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "6")])
 						     
 ;; This is how combine canonicalizes this pattern.  This is perhaps a bug
 ;; in combine.c, but there is no problem with writing it this way so we do.
@@ -2075,7 +2029,9 @@
 		     (match_operand:HI 4 "immediate_operand" "1")))]
   "GET_CODE (operands[3]) == CONST_INT && GET_CODE (operands[1]) == CONST_INT
    && exact_log2 (INTVAL (operands[3])) == INTVAL (operands[1])"
-  "bnot	%Z1,%Y0")
+  "bnot	%Z1,%Y0"
+  [(set_attr "cc" "none_0hit")
+   (set_attr "length" "2")])
 
 ;; ??? Implement BIAND, BIOR, BIXOR
 
@@ -2187,8 +2143,7 @@
 		 (match_operand:HI 2 "register_operand" "ra")))]
   "TARGET_H8300"
   "mov.w	%T1,%T0\;add.w	%T2,%T0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "6")
+  [(set_attr "length" "6")
    (set_attr "cc" "set_zn_c0")])
 
 
@@ -2312,20 +2267,6 @@
   [(set_attr "length" "2")
    (set_attr "cc" "set")])
 
-;(define_insn ""
-;  [(set (match_operand:HI 0 "register_operand" "=r")
-;	(MEM:HI (match_operand:HI 1 "register_operand" "r")))
-;   (set (match_operand:HI 3 "register_operand" "=r")
-;	(zero_extract:HI (match_dup 0)
-;			 (const_int 1)
-;			 (match_operand:HI 2 "general_operand" "g")))
-;   (set (MEM:HI (match_dup 1) (match_dup 3)))]
-;  ""
-;  "bld	#0,%3l\;bst	%Z2,%0%Y1"
-;  [(set_attr "type" "multi")
-;   (set_attr "length" "4")
-;   (set_attr "cc" "clobber")])
-
 (define_insn "fancybset1"
   [(set (match_operand:QI 0 "bit_operand" "=Ur")
 	(ior:QI (subreg:QI 
@@ -2333,7 +2274,9 @@
 			    (subreg:QI (match_operand:HI 1 "register_operand" "ri") 0)) 0)
 		(match_dup 0)))]
   ""
-  "bset	%X1,%R0")	
+  "bset	%X1,%R0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybset"
   [(set (match_operand:QI 0 "bit_operand" "=Ur")
@@ -2342,7 +2285,9 @@
 			    (match_operand:HI 1 "nonmemory_operand" "ri") ) 0)
 		(match_operand:QI 2 "general_operand" "Ur")))]
   ""
-  "mov.b	%R2,%R0\;bset	%X1,%R0")	
+  "mov.b	%R2,%R0\;bset	%X1,%R0"
+  [(set_attr "length" "4")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybclr4"
   [(set (match_operand:QI 0 "general_operand" "=Ur,Ur")
@@ -2355,7 +2300,9 @@
   ""
   "@
    bclr	%X2,%R0; l1
-   mov.b	%R1,%X3\;mov.b	%3,%0\;bclr	%X2,%R0; l3")
+   mov.b	%R1,%X3\;mov.b	%3,%0\;bclr	%X2,%R0; l3"
+  [(set_attr "length" "8")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybclr5"
   [(set (match_operand:QI 0 "general_operand" "=Ur,Ur")
@@ -2368,7 +2315,9 @@
   ""
   "@
    bclr	%X2,%R0; l1
-   mov.b	%R1,%X3\;mov.b	%3,%0\;bclr	%X2,%R0;l2")
+   mov.b	%R1,%X3\;mov.b	%3,%0\;bclr	%X2,%R0;l2"
+  [(set_attr "length" "8")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybclr2"
   [(set (match_operand:QI 0 "general_operand" "=U,r")
@@ -2378,7 +2327,9 @@
 		     (match_operand:HI 2 "nonmemory_operand" "ri,ri") ) 0)
 	 (match_operand:QI 1 "general_operand" "0,0")))]
   ""
-  "bclr	%X2,%R0")
+  "bclr	%X2,%R0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybclr3"
   [(set (match_operand:QI 0 "general_operand" "=U,r")
@@ -2388,14 +2339,18 @@
 		     (match_operand:QI 2 "nonmemory_operand" "ri,ri")) 0)
 	 (match_operand:QI 1 "general_operand" "0,0")))]
   ""
-  "bclr	%X2,%R0")
+  "bclr	%X2,%R0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybclr"
   [(set (match_operand:QI 0 "general_operand" "=r")
 	(and:QI (not:QI (match_operand:QI 1 "general_operand" "0"))
 		(match_operand:QI 2 "general_operand" "r")))]
   ""
-  "not	%X0\;and	%X2,%X0")
+  "not	%X0\;and	%X2,%X0"
+  [(set_attr "length" "4")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybsetp3"
   [(set (match_operand:QI 0 "bit_operand" "=Ur")
@@ -2403,7 +2358,9 @@
 				      (match_operand:QI 1 "register_operand" "r")) 0)
 		(match_operand:QI 2 "bit_operand" "0")))]
   ""
-  "bset	%X1,%R0")
+  "bset	%X1,%R0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancybsetp2"
   [(set (match_operand:QI 0 "general_operand" "=r,U")
@@ -2411,7 +2368,9 @@
 				      (match_operand:QI 1 "register_operand" "r,r")) 0)
 		(match_operand:QI 2 "general_operand" "U,r")))]
   ""
-  "mov.b	%R2,%R0\;bset	%X1,%R0")
+  "mov.b	%R2,%R0\;bset	%X1,%R0"
+  [(set_attr "length" "4")
+   (set_attr "cc" "clobber")])
 	
 (define_insn "fancybnot"
   [(set (match_operand:QI 0 "bit_operand" "=Ur")
@@ -2420,7 +2379,9 @@
 		(match_operand:QI 2 "bit_operand" "0")))]
 
   ""
-  "bnot	%X1,%R0")
+  "bnot	%X1,%R0"
+  [(set_attr "length" "2")
+   (set_attr "cc" "clobber")])
 
 (define_insn "fancy_btst"
   [(set (pc)
@@ -2472,6 +2433,5 @@
 			(const_int 1)))]
   ""
   "bld	#0,%R2\;bist	%1,%0"
-  [(set_attr "type" "arith")
-   (set_attr "length" "4")
+  [(set_attr "length" "4")
    (set_attr "cc" "clobber")])