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authorJan Hubicka <hubicka@ucw.cz>2017-10-08 12:41:44 +0200
committerJan Hubicka <hubicka@gcc.gnu.org>2017-10-08 10:41:44 +0000
commiteb79a6b1cb7b97cda532e2efd5612fa80c3eb005 (patch)
treebb7188aa6707565a5ae3201f965662eb0c5efc78 /gcc
parenta9f3126aad1238959612daf004c45f139a9737c0 (diff)
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* i386.c (has_dispatch): Disable for Ryzen.
From-SVN: r253523
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/i386/i386.c3
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c4a7c62..e745313 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-10-08 Jan Hubicka <hubicka@ucw.cz>
+
+ * i386.c (has_dispatch): Disable for Ryzen.
+
2017-10-08 Olivier Hainque <hainque@adacore.com>
* config/arm/arm.c (arm_set_return_address): Use MEM_VOLATILE_P
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e90cbfb..8613aa8 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -51798,8 +51798,9 @@ do_dispatch (rtx_insn *insn, int mode)
static bool
has_dispatch (rtx_insn *insn, int action)
{
+ /* Current implementation of dispatch scheduler models buldozer only. */
if ((TARGET_BDVER1 || TARGET_BDVER2 || TARGET_BDVER3
- || TARGET_BDVER4 || TARGET_ZNVER1) && flag_dispatch_scheduler)
+ || TARGET_BDVER4) && flag_dispatch_scheduler)
switch (action)
{
default: