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author | Michael Meissner <meissner@gcc.gnu.org> | 1994-09-13 21:44:15 +0000 |
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committer | Michael Meissner <meissner@gcc.gnu.org> | 1994-09-13 21:44:15 +0000 |
commit | eb085d72becf24be9c72b90598cb0ffb2ba0702e (patch) | |
tree | a40998df0ef7c0efc575cfe6983aed65dcd3b259 /gcc | |
parent | bd1a74b1a72ed586301861048e0d9fc945c2875a (diff) | |
download | gcc-eb085d72becf24be9c72b90598cb0ffb2ba0702e.zip gcc-eb085d72becf24be9c72b90598cb0ffb2ba0702e.tar.gz gcc-eb085d72becf24be9c72b90598cb0ffb2ba0702e.tar.bz2 |
More DF/XF/DI fixes.
From-SVN: r8079
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/i386/i386.md | 120 |
1 files changed, 72 insertions, 48 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 986f7f3..998027e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1329,6 +1329,11 @@ { /* 1 scratch register */ output_asm_insn (AS2 (mov%L0,%2,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); + + /* account for push above */ + if (reg_mentioned_p (stack_pointer_rtx, XEXP (xop[3], 0))) + xop[3] = adj_offsettable_operand (xop[3], 4); + output_asm_insn (AS2 (mov%L0,%3,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); } @@ -1533,6 +1538,11 @@ output_asm_insn (AS2 (mov%L0,%3,%1), xop); output_asm_insn (AS1 (push%L0,%0), xop); output_asm_insn (AS1 (push%L0,%1), xop); + + /* account for 2 pushes above */ + if (reg_mentioned_p (stack_pointer_rtx, XEXP (xop[4], 0))) + xop[4] = adj_offsettable_operand (xop[4], 8); + output_asm_insn (AS2 (mov%L0,%4,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); } @@ -1540,8 +1550,18 @@ { /* 1 scratch register */ output_asm_insn (AS2 (mov%L0,%2,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); + + /* account for 1 push above */ + if (reg_mentioned_p (stack_pointer_rtx, XEXP (xop[3], 0))) + xop[3] = adj_offsettable_operand (xop[3], 4); + output_asm_insn (AS2 (mov%L0,%3,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); + + /* account for 2 pushes above */ + if (reg_mentioned_p (stack_pointer_rtx, XEXP (xop[4], 0))) + xop[4] = adj_offsettable_operand (xop[4], 8); + output_asm_insn (AS2 (mov%L0,%4,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); } @@ -1573,19 +1593,19 @@ { /* 2 scratch registers available */ output_asm_insn (AS2 (mov%L0,%2,%0), xop); output_asm_insn (AS2 (mov%L0,%3,%1), xop); - output_asm_insn (AS2 (mov%L5,%5,%0), xop); - output_asm_insn (AS2 (mov%L6,%6,%1), xop); + output_asm_insn (AS2 (mov%L5,%0,%5), xop); + output_asm_insn (AS2 (mov%L6,%1,%6), xop); output_asm_insn (AS2 (mov%L0,%4,%0), xop); - output_asm_insn (AS2 (mov%L7,%7,%0), xop); + output_asm_insn (AS2 (mov%L7,%0,%7), xop); } else { /* 1 scratch register */ output_asm_insn (AS2 (mov%L0,%2,%0), xop); - output_asm_insn (AS2 (mov%L0,%5,%0), xop); + output_asm_insn (AS2 (mov%L0,%0,%5), xop); output_asm_insn (AS2 (mov%L0,%3,%0), xop); - output_asm_insn (AS2 (mov%L0,%6,%0), xop); + output_asm_insn (AS2 (mov%L0,%0,%6), xop); output_asm_insn (AS2 (mov%L0,%4,%0), xop); - output_asm_insn (AS2 (mov%L7,%7,%0), xop); + output_asm_insn (AS2 (mov%L7,%0,%7), xop); } RET; @@ -1722,6 +1742,11 @@ { /* 1 scratch register */ output_asm_insn (AS2 (mov%L0,%2,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); + + /* account for push above */ + if (reg_mentioned_p (stack_pointer_rtx, XEXP (xop[3], 0))) + xop[3] = adj_offsettable_operand (xop[3], 4); + output_asm_insn (AS2 (mov%L0,%3,%0), xop); output_asm_insn (AS1 (push%L0,%0), xop); } @@ -2190,7 +2215,7 @@ (define_expand "fixuns_truncdfsi2" [(set (match_dup 4) - (match_operand:DF 1 "general_operand" "")) + (match_operand:DF 1 "register_operand" "")) (parallel [(set (match_dup 2) (fix:DI (fix:DF (match_dup 4)))) (clobber (match_dup 4)) @@ -2211,7 +2236,7 @@ (define_expand "fixuns_truncsfsi2" [(set (match_dup 4) - (match_operand:SF 1 "general_operand" "")) + (match_operand:SF 1 "register_operand" "")) (parallel [(set (match_dup 2) (fix:DI (fix:SF (match_dup 4)))) (clobber (match_dup 4)) @@ -2233,63 +2258,62 @@ ;; Signed conversion to DImode. (define_expand "fix_truncxfdi2" - [(set (match_operand:DI 0 "general_operand" "") - (fix:DI (match_operand:XF 1 "general_operand" "")))] + [(set (match_dup 2) + (match_operand:XF 1 "register_operand" "")) + (parallel [(set (match_operand:DI 0 "general_operand" "") + (fix:DI (fix:XF (match_dup 2)))) + (clobber (match_dup 2)) + (clobber (match_dup 3)) + (clobber (match_dup 4)) + (clobber (match_scratch:SI 5 ""))])] "TARGET_80387" " { - if (operands[0]) /* prevent unused code message */ - { - rtx reg = gen_reg_rtx (XFmode); - emit_insn (gen_movxf (reg, operands[1])); - emit_insn (gen_fix_truncxfdi2_internal (operands[0], - reg, - assign_386_stack_local (SImode, 0), - assign_386_stack_local (SImode, 1))); - DONE; - } + operands[1] = copy_to_mode_reg (XFmode, operands[1]); + operands[2] = gen_reg_rtx (XFmode); + operands[3] = (rtx) assign_386_stack_local (SImode, 0); + operands[4] = (rtx) assign_386_stack_local (SImode, 1); }") (define_expand "fix_truncdfdi2" - [(set (match_operand:DI 0 "general_operand" "") - (fix:DI (match_operand:DF 1 "general_operand" "")))] + [(set (match_dup 2) + (match_operand:DF 1 "register_operand" "")) + (parallel [(set (match_operand:DI 0 "general_operand" "") + (fix:DI (fix:DF (match_dup 2)))) + (clobber (match_dup 2)) + (clobber (match_dup 3)) + (clobber (match_dup 4)) + (clobber (match_scratch:SI 5 ""))])] "TARGET_80387" " { - if (operands[0]) /* prevent unused code message */ - { - rtx reg = gen_reg_rtx (DFmode); - emit_insn (gen_movdf (reg, operands[1])); - emit_insn (gen_fix_truncdfdi2_internal (operands[0], - reg, - assign_386_stack_local (SImode, 0), - assign_386_stack_local (SImode, 1))); - DONE; - } + operands[1] = copy_to_mode_reg (DFmode, operands[1]); + operands[2] = gen_reg_rtx (DFmode); + operands[3] = (rtx) assign_386_stack_local (SImode, 0); + operands[4] = (rtx) assign_386_stack_local (SImode, 1); }") - (define_expand "fix_truncsfdi2" - [(set (match_operand:DI 0 "general_operand" "") - (fix:DI (match_operand:SF 1 "general_operand" "")))] + [(set (match_dup 2) + (match_operand:SF 1 "register_operand" "")) + (parallel [(set (match_operand:DI 0 "general_operand" "") + (fix:DI (fix:SF (match_dup 2)))) + (clobber (match_dup 2)) + (clobber (match_dup 3)) + (clobber (match_dup 4)) + (clobber (match_scratch:SI 5 ""))])] "TARGET_80387" " { - if (operands[0]) /* prevent unused code message */ - { - rtx reg = gen_reg_rtx (SFmode); - emit_insn (gen_movsf (reg, operands[1])); - emit_insn (gen_fix_truncsfdi2_internal (operands[0], - reg, - assign_386_stack_local (SImode, 0), - assign_386_stack_local (SImode, 1))); - DONE; - } + operands[1] = copy_to_mode_reg (SFmode, operands[1]); + operands[2] = gen_reg_rtx (SFmode); + operands[3] = (rtx) assign_386_stack_local (SImode, 0); + operands[4] = (rtx) assign_386_stack_local (SImode, 1); }") ;; These match a signed conversion of either DFmode or SFmode to DImode. -(define_insn "fix_truncxfdi2_internal" +(define_insn "" [(set (match_operand:DI 0 "general_operand" "=rm") (fix:DI (fix:XF (match_operand:XF 1 "register_operand" "f")))) (clobber (match_dup 1)) @@ -2299,7 +2323,7 @@ "TARGET_80387" "* return output_fix_trunc (insn, operands);") -(define_insn "fix_truncdfdi2_internal" +(define_insn "" [(set (match_operand:DI 0 "general_operand" "=rm") (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "f")))) (clobber (match_dup 1)) @@ -2309,7 +2333,7 @@ "TARGET_80387" "* return output_fix_trunc (insn, operands);") -(define_insn "fix_truncsfdi2_internal" +(define_insn "" [(set (match_operand:DI 0 "general_operand" "=rm") (fix:DI (fix:SF (match_operand:SF 1 "register_operand" "f")))) (clobber (match_dup 1)) |