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authorJeroen Dobbelaere <jeroen.dobbelaere@acunia.com>2002-07-17 09:54:11 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2002-07-17 09:54:11 +0000
commite9d7b180c2ec37f3a85e5a63b196e61854c7eb20 (patch)
tree7b748053cccb7bd4ddd0b7c3434b6df07e70bdba /gcc
parent8214bf98d2177d333ce6ac401789b444ccf43658 (diff)
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From Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>
* arm.h (ARM_NUM_INTS, ARM_NUM_REGS, ARM_NUM_REGS2): Renamed from NUM_INTS, NUM_REGS and ARM_NUM_REGS2 respectively. All uses changed. * arm.c: Similarly. From-SVN: r55515
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm.c8
-rw-r--r--gcc/config/arm/arm.h18
3 files changed, 19 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b23d59d..49ff07c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-07-17 Jeroen Dobbelaere <jeroen.dobbelaere@acunia.com>
+
+ * arm.h (ARM_NUM_INTS, ARM_NUM_REGS, ARM_NUM_REGS2): Renamed from
+ NUM_INTS, NUM_REGS and ARM_NUM_REGS2 respectively. All uses changed.
+ * arm.c: Similarly.
+
2002-07-17 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips-protos.h (mips_sign_extend): Declare.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 928b169..cd75a6b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4449,7 +4449,7 @@ arm_gen_movstrqi (operands)
fin_dst = dst = copy_to_mode_reg (SImode, st_dst);
fin_src = src = copy_to_mode_reg (SImode, st_src);
- in_words_to_go = NUM_INTS (INTVAL (operands[2]));
+ in_words_to_go = ARM_NUM_INTS (INTVAL (operands[2]));
out_words_to_go = INTVAL (operands[2]) / 4;
last_bytes = INTVAL (operands[2]) & 3;
@@ -8563,7 +8563,7 @@ arm_print_operand (stream, x, code)
case 'M':
asm_fprintf (stream, "{%r-%r}",
REGNO (x),
- REGNO (x) + NUM_REGS (GET_MODE (x)) - 1);
+ REGNO (x) + ARM_NUM_REGS (GET_MODE (x)) - 1);
return;
case 'd':
@@ -9164,7 +9164,7 @@ arm_hard_regno_mode_ok (regno, mode)
register available to hold the upper part of the value.
We probably we ought to ensure that the register is the
start of an even numbered register pair. */
- return (NUM_REGS (mode) < 2) || (regno < LAST_LO_REGNUM);
+ return (ARM_NUM_REGS (mode) < 2) || (regno < LAST_LO_REGNUM);
if (regno <= LAST_ARM_REGNUM)
/* We allow any value to be stored in the general regisetrs. */
@@ -10309,7 +10309,7 @@ thumb_output_function_prologue (f, size)
asm_fprintf (f, "\tpush\t{");
- num_pushes = NUM_INTS (current_function_pretend_args_size);
+ num_pushes = ARM_NUM_INTS (current_function_pretend_args_size);
for (regno = LAST_ARG_REGNUM + 1 - num_pushes;
regno <= LAST_ARG_REGNUM;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index b18fff2..aee6484 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -855,15 +855,15 @@ extern const char * structure_size_string;
#define ROUND_UP(X) (((X) + 3) & ~3)
/* Convert fron bytes to ints. */
-#define NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+#define ARM_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* The number of (integer) registers required to hold a quantity of type MODE. */
-#define NUM_REGS(MODE) \
- NUM_INTS (GET_MODE_SIZE (MODE))
+#define ARM_NUM_REGS(MODE) \
+ ARM_NUM_INTS (GET_MODE_SIZE (MODE))
/* The number of (integer) registers required to hold a quantity of TYPE MODE. */
-#define NUM_REGS2(MODE, TYPE) \
- NUM_INTS ((MODE) == BLKmode ? \
+#define ARM_NUM_REGS2(MODE, TYPE) \
+ ARM_NUM_INTS ((MODE) == BLKmode ? \
int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))
/* The number of (integer) argument register available. */
@@ -967,7 +967,7 @@ extern const char * structure_size_string;
&& REGNO >= FIRST_ARM_FP_REGNUM \
&& REGNO != FRAME_POINTER_REGNUM \
&& REGNO != ARG_POINTER_REGNUM) \
- ? 1 : NUM_REGS (MODE))
+ ? 1 : ARM_NUM_REGS (MODE))
/* Return true if REGNO is suitable for holding a quantity of type MODE. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
@@ -1288,7 +1288,7 @@ enum reg_class
needed to represent mode MODE in a register of class CLASS.
ARM regs are UNITS_PER_WORD bits while FPU regs can hold any FP mode */
#define CLASS_MAX_NREGS(CLASS, MODE) \
- ((CLASS) == FPU_REGS ? 1 : NUM_REGS (MODE))
+ ((CLASS) == FPU_REGS ? 1 : ARM_NUM_REGS (MODE))
/* Moves between FPU_REGS and GENERAL_REGS are two memory insns. */
#define REGISTER_MOVE_COST(MODE, FROM, TO) \
@@ -1467,7 +1467,7 @@ typedef struct
For args passed entirely in registers or entirely in memory, zero. */
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
( NUM_ARG_REGS > (CUM).nregs \
- && (NUM_ARG_REGS < ((CUM).nregs + NUM_REGS2 (MODE, TYPE))) \
+ && (NUM_ARG_REGS < ((CUM).nregs + ARM_NUM_REGS2 (MODE, TYPE))) \
? NUM_ARG_REGS - (CUM).nregs : 0)
/* Initialize a variable CUM of type CUMULATIVE_ARGS
@@ -1481,7 +1481,7 @@ typedef struct
of mode MODE and data type TYPE.
(TYPE is null for libcalls where that information may not be available.) */
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
- (CUM).nregs += NUM_REGS2 (MODE, TYPE)
+ (CUM).nregs += ARM_NUM_REGS2 (MODE, TYPE)
/* 1 if N is a possible register number for function argument passing.
On the ARM, r0-r3 are used to pass args. */