Daily bump.

5 files changed, 233 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index edf3229..9836574 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,104 @@
+2024-10-09  liuhongt  <hongtao.liu@intel.com>
+
+	* tree-vect-loop.cc (vect_analyze_loop_costing): Enable
+	vectorization for LOOP_VINFO_PEELING_FOR_NITER in very cheap
+	cost model.
+	(vect_analyze_loop): Disable epilogue vectorization in very
+	cheap cost model.
+	* doc/invoke.texi: Adjust documents for very-cheap cost model.
+
+2024-10-09  Jovan Vukic  <Jovan.Vukic@rt-rk.com>
+
+	PR target/115921
+	* config/riscv/iterators.md (any_eq): New code iterator.
+	* config/riscv/riscv.h (COMMON_TRAILING_ZEROS): New macro.
+	(SMALL_AFTER_COMMON_TRAILING_SHIFT): Ditto.
+	* config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_<optab>_shifted):
+	New pattern.
+
+2024-10-09  Jeff Law  <jlaw@ventanamicro.com>
+
+	Revert:
+	2024-10-08  Tsung Chun Lin  <tclin914@gmail.com>
+
+	* common/config/riscv/riscv-common.cc: M implies Zmmul.
+
+2024-10-09  Jeff Law  <jlaw@ventanamicro.com>
+
+	Revert:
+	2024-10-08  Tsung Chun Lin  <tclin914@gmail.com>
+
+	* config/riscv/riscv-c.cc: (riscv_cpu_cpp_builtins):
+	Enable builtin __riscv_mul with Zmmul extension.
+
+2024-10-09  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/116629
+	* config/aarch64/aarch64-sve-builtins.cc
+	(function_builder::function_builder): Use direct overloads for LTO.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	* tree-vect-data-refs.cc (vect_analyze_data_ref_access): When
+	cancelling a DR group also clear DR_GROUP_NEXT_ELEMENT.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/117041
+	* tree-vect-stmts.cc (get_group_load_store_type): Only
+	check DR_GROUP_NEXT_ELEMENT for STMT_VINFO_GROUPED_ACCESS.
+
+2024-10-09  René Rebe  <rene@exactcode.de>
+
+	* config/ia64/ia64.cc: Enable LRA for ia64.
+	* config/ia64/ia64.md: Likewise.
+	* config/ia64/predicates.md: Likewise.
+
+2024-10-09  René Rebe  <rene@exactcode.de>
+
+	* config.gcc: Only list ia64*-*-(hpux|vms|elf) in the list of
+	obsoleted targets.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/116974
+	* tree-vect-stmts.cc (check_scan_store): Pass in the SLP node
+	instead of just a flag.  Allow single-lane scan stores.
+	(vectorizable_store): Adjust.
+	* tree-vect-loop.cc (vect_analyze_loop_2): Empty scan_map
+	before re-trying.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/116575
+	PR tree-optimization/114375
+	* tree-vect-slp.cc (vect_build_slp_tree_2): Do not reject
+	permuted mask loads without gaps but instead discover a
+	node for the full unpermuted load and permute that with
+	a VEC_PERM node.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/117000
+	* match.pd (.REDUC_IOR !=/== 0): New pattern.
+	* gimple-match-head.cc: Include memmodel.h and optabs.h.
+	* generic-match-head.cc: Likewise.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	* tree-vect-slp.cc (vect_cse_slp_nodes): Fix memory leak.
+
+2024-10-09  Jan Beulich  <jbeulich@suse.com>
+
+	* doc/extend.texi: Clarify __builtin_choose_expr()
+	(dis)similarity to the ?: operator.
+
+2024-10-09  Ken Matsui  <kmatsui@gcc.gnu.org>
+
+	PR preprocessor/89808
+	* doc/invoke.texi (Warning Options): Document
+	-Wno-pragma-once-outside-header.
+
 2024-10-09  Artemiy Volkov  <Artemiy.Volkov@synopsys.com>
 
 	PR tree-optimization/116024
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6d0d2e7..7f0f80c 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241009
+20241010
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 3a363df..09c966a 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,25 @@
+2024-10-09  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/117038
+	* fe.h (struct c_array): Add 'const' to declaration of pointer.
+	(C_Source_Buffer): Use consistent formatting.
+	* par-ch3.adb (P_Component_Items): Properly set Aliased_Present on
+	access definition.
+	* sinput.ads: Remove clause for Interfaces.C.
+	(C_Array): Change type of Length to Integer and make both components
+	aliased.  Remove Convention aspect.
+	(C_Source_Buffer): Remove all aspects.
+	* sinput.adb (C_Source_Buffer): Adjust to above change.
+
+2024-10-09  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* Makefile.rtl: Remove HP-UX 10 section.
+	* libgnarl/s-osinte__hpux-dce.ads: Delete.
+	* libgnarl/s-osinte__hpux-dce.adb: Likewise.
+	* libgnarl/s-taprop__hpux-dce.adb: Likewise.
+	* libgnarl/s-taspri__hpux-dce.ads: Likewise.
+	* libgnat/s-oslock__hpux-dce.ads: Likewise.
+
 2024-10-08  Eric Botcazou  <ebotcazou@adacore.com>
 
 	PR ada/116498
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 98f6586..67ee6a4 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,13 @@
+2024-10-09  Jason Merrill  <jason@redhat.com>
+
+	* c-ppoutput.cc (preprocess_file): Set directives_only flag.
+
+2024-10-09  Ken Matsui  <kmatsui@gcc.gnu.org>
+
+	PR preprocessor/89808
+	* c.opt (Wpragma_once_outside_header): Define new option.
+	* c.opt.urls: Regenerate.
+
 2024-10-07  Jason Merrill  <jason@redhat.com>
 
 	* c-ppoutput.cc (preprocess_file): For modules,
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1f4024d..79d1ca6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,102 @@
+2024-10-09  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.dg/fstack-protector-strong.c: Adjust
+	scan-assembler-times.
+	* gcc.dg/graphite/scop-6.c: Refine the testcase to avoid array
+	out of bounds.
+	* gcc.dg/graphite/scop-9.c: Ditto.
+	* gcc.dg/tree-ssa/ivopts-lt-2.c: Add -fno-tree-vectorize.
+	* gcc.dg/tree-ssa/ivopts-lt.c: Ditto.
+	* gcc.dg/tree-ssa/loop-16.c: Ditto.
+	* gcc.dg/tree-ssa/loop-28.c: Ditto.
+	* gcc.dg/tree-ssa/loop-bound-2.c: Ditto.
+	* gcc.dg/tree-ssa/loop-bound-4.c: Ditto.
+	* gcc.dg/tree-ssa/loop-bound-6.c: Ditto.
+	* gcc.dg/tree-ssa/predcom-4.c: Ditto.
+	* gcc.dg/tree-ssa/predcom-5.c: Ditto.
+	* gcc.dg/tree-ssa/scev-11.c: Ditto.
+	* gcc.dg/tree-ssa/scev-9.c: Ditto.
+	* gcc.dg/tree-ssa/split-path-11.c: Ditto.
+	* gcc.dg/unroll-8.c: Ditto.
+	* gcc.dg/var-expand1.c: Ditto.
+	* gcc.dg/vect/vect-cost-model-6.c: Removed.
+	* gcc.target/i386/pr86270.c: Ditto.
+	* gcc.target/i386/pr86722.c: Ditto.
+	* gcc.target/x86_64/abi/callabi/leaf-2.c: Ditto.
+
+2024-10-09  Jovan Vukic  <Jovan.Vukic@rt-rk.com>
+
+	PR target/115921
+	* gcc.target/riscv/branch-1.c: Additional tests.
+
+2024-10-09  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* gcc.target/arm/mod_2.c: Corrected effective-target to
+	arm_cpu_cortex_a57_ok.
+	* gcc.target/arm/mod_256.c: Likewise.
+
+2024-10-09  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/116629
+	* gcc.target/aarch64/sve/acle/general/pr106326_2.c: New test.
+
+2024-10-09  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* lib/scanasm.exp (check-function-bodies): Look in ltrans0.ltrans.s
+	if the test appears to be using LTO.
+
+2024-10-09  Jonathan Wakely  <jwakely@redhat.com>
+
+	* g++.dg/cpp0x/initlist-opt1.C: Adjust for different diagnostics
+	from std::construct_at by adding -fconcepts-diagnostics-depth=2.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/117041
+	* gcc.dg/torture/pr117041.c: New testcase.
+
+2024-10-09  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* gcc.target/arm/pr65647.c: Use effective-target arm_arch_v6m.
+	Removed unneeded dg-skip-if.
+	* gcc.target/arm/mod_2.c: Use effective-target arm_cpu_cortex_a57.
+	* gcc.target/arm/mod_256.c: Likewise.
+	* gcc.target/arm/vseleqdf.c: Likewise.
+	* gcc.target/arm/vseleqsf.c: Likewise.
+	* gcc.target/arm/vselgedf.c: Likewise.
+	* gcc.target/arm/vselgesf.c: Likewise.
+	* gcc.target/arm/vselgtdf.c: Likewise.
+	* gcc.target/arm/vselgtsf.c: Likewise.
+	* gcc.target/arm/vselledf.c: Likewise.
+	* gcc.target/arm/vsellesf.c: Likewise.
+	* gcc.target/arm/vselltdf.c: Likewise.
+	* gcc.target/arm/vselltsf.c: Likewise.
+	* gcc.target/arm/vselnedf.c: Likewise.
+	* gcc.target/arm/vselnesf.c: Likewise.
+	* gcc.target/arm/vselvcdf.c: Likewise.
+	* gcc.target/arm/vselvcsf.c: Likewise.
+	* gcc.target/arm/vselvsdf.c: Likewise.
+	* gcc.target/arm/vselvssf.c: Likewise.
+	* lib/target-supports.exp: Define effective-target arm_cpu_cortex_a57.
+	Update effective-target arm_v8_1_lob_ok to use -mcpu=unset.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/116575
+	PR tree-optimization/114375
+	* gcc.dg/vect/vect-pr114375.c: Expect vectorization now with avx2.
+
+2024-10-09  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/117000
+	* gcc.target/i386/pr117000.c: New testcase.
+
+2024-10-09  Ken Matsui  <kmatsui@gcc.gnu.org>
+
+	PR preprocessor/89808
+	* g++.dg/warn/Wno-pragma-once-outside-header.C: New test.
+	* g++.dg/warn/Wpragma-once-outside-header.C: New test.
+
 2024-10-09  Artemiy Volkov  <Artemiy.Volkov@synopsys.com>
 
 	* gcc.dg/tree-ssa/pr116024-2.c: New test.