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author | Andreas Schwab <schwab@suse.de> | 2025-01-07 12:31:39 -0700 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2025-01-07 12:31:39 -0700 |
commit | e8a3f6bfb8d92756bc33c3a520bca1ff644d64b7 (patch) | |
tree | 24046abb759e1a21ab58519a95c08ac7e027cc26 /gcc | |
parent | 013e66ea95a241c472b9d87430efaf6c759cf5c0 (diff) | |
download | gcc-e8a3f6bfb8d92756bc33c3a520bca1ff644d64b7.zip gcc-e8a3f6bfb8d92756bc33c3a520bca1ff644d64b7.tar.gz gcc-e8a3f6bfb8d92756bc33c3a520bca1ff644d64b7.tar.bz2 |
[PATCH] testsuite: enable effective-target sync_char_short on RISC-V
gcc/testuite/
* lib/target-supports.exp
(check_effective_target_sync_char_short): Enable for riscv*-*-*.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 0ff00d1..e6a876d 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -10051,6 +10051,7 @@ proc check_effective_target_sync_char_short { } { || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9]) || ([istarget arc*-*-*] && [check_effective_target_arc_atomic]) || [istarget loongarch*-*-*] + || [istarget riscv*-*-*] || [check_effective_target_mips_llsc] }}] } |