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author | Jeff Law <jlaw@ventanamicro.com> | 2024-10-09 16:21:56 -0600 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2024-10-09 16:21:56 -0600 |
commit | e889235cb004b62f3004408283ce91eb20eb521a (patch) | |
tree | ac08b189f5018dc40843ecdd79bf61feaf658c5d /gcc | |
parent | 7ac96b05cfa7478706dce175e7c7b09cbf559451 (diff) | |
download | gcc-e889235cb004b62f3004408283ce91eb20eb521a.zip gcc-e889235cb004b62f3004408283ce91eb20eb521a.tar.gz gcc-e889235cb004b62f3004408283ce91eb20eb521a.tar.bz2 |
Revert "RISC-V: Enable builtin __riscv_mul with Zmmul extension."
This reverts commit 2990f5802a727cbd717587c3a345fa940193049f.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/riscv/riscv-c.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc index 7e9c478..71112d9 100644 --- a/gcc/config/riscv/riscv-c.cc +++ b/gcc/config/riscv/riscv-c.cc @@ -123,7 +123,7 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) if (TARGET_ATOMIC) builtin_define ("__riscv_atomic"); - if (TARGET_ZMMUL) + if (TARGET_MUL) builtin_define ("__riscv_mul"); if (TARGET_DIV) builtin_define ("__riscv_div"); |