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authorWilco Dijkstra <wdijkstr@arm.com>2014-09-12 09:46:25 +0000
committerJiong Wang <jiwang@gcc.gnu.org>2014-09-12 09:46:25 +0000
commite4a9c55ade081438460f6b0db8afbaad34b05d35 (patch)
tree960db3b92fcf2f2580c754dcf7514432511585ad /gcc
parent20b32e50e22de63de27708dfe50c5f51cb29eaac (diff)
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[AArch64] Add regmove_costs for Cortex-A57 and A53
2014-09-12 Wilco Dijkstra <wdijkstr@arm.com> * gcc/config/aarch64/aarch64.c: (cortexa57_regmove_cost): New cost table for A57. (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP cost to spilling from integer to FP registers. From-SVN: r215208
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/aarch64/aarch64.c24
2 files changed, 29 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b10f285..af00004 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
+ * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
+ for A57.
+ (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
+ cost to spilling from integer to FP registers.
+
+2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
+
* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 73ddb0d..15c7be6 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -218,6 +218,26 @@ static const struct cpu_regmove_cost generic_regmove_cost =
NAMED_PARAM (FP2FP, 2)
};
+static const struct cpu_regmove_cost cortexa57_regmove_cost =
+{
+ NAMED_PARAM (GP2GP, 1),
+ /* Avoid the use of slow int<->fp moves for spilling by setting
+ their cost higher than memmov_cost. */
+ NAMED_PARAM (GP2FP, 5),
+ NAMED_PARAM (FP2GP, 5),
+ NAMED_PARAM (FP2FP, 2)
+};
+
+static const struct cpu_regmove_cost cortexa53_regmove_cost =
+{
+ NAMED_PARAM (GP2GP, 1),
+ /* Avoid the use of slow int<->fp moves for spilling by setting
+ their cost higher than memmov_cost. */
+ NAMED_PARAM (GP2FP, 5),
+ NAMED_PARAM (FP2GP, 5),
+ NAMED_PARAM (FP2FP, 2)
+};
+
/* Generic costs for vector insn classes. */
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
@@ -275,7 +295,7 @@ static const struct tune_params cortexa53_tunings =
{
&cortexa53_extra_costs,
&generic_addrcost_table,
- &generic_regmove_cost,
+ &cortexa53_regmove_cost,
&generic_vector_cost,
NAMED_PARAM (memmov_cost, 4),
NAMED_PARAM (issue_rate, 2)
@@ -285,7 +305,7 @@ static const struct tune_params cortexa57_tunings =
{
&cortexa57_extra_costs,
&cortexa57_addrcost_table,
- &generic_regmove_cost,
+ &cortexa57_regmove_cost,
&cortexa57_vector_cost,
NAMED_PARAM (memmov_cost, 4),
NAMED_PARAM (issue_rate, 3)