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author | Vladimir Makarov <vmakarov@redhat.com> | 2018-12-06 18:41:46 +0000 |
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committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 2018-12-06 18:41:46 +0000 |
commit | e384094ac2e3bf7bac69453fb0579fa8a7c35b3e (patch) | |
tree | 2bce7236e1397dd1d66b05e14857892d6e6a6abe /gcc | |
parent | 5da8ebe9c61f304107b1bcb5146e068093b72d0d (diff) | |
download | gcc-e384094ac2e3bf7bac69453fb0579fa8a7c35b3e.zip gcc-e384094ac2e3bf7bac69453fb0579fa8a7c35b3e.tar.gz gcc-e384094ac2e3bf7bac69453fb0579fa8a7c35b3e.tar.bz2 |
re PR target/88282 (ICE in df_install_refs at gcc/df-scan.c:2379)
2018-12-06 Vladimir Makarov <vmakarov@redhat.com>
PR target/88282
* ira.c (ira_init_register_move_cost): Use info from
hard_regno_mode_ok instead of contains_reg_of_mode.
* ira-costs.c (contains_reg_of_mode): Don't use cost from bigger
hard register class for some fixed hard registers.
From-SVN: r266862
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/ira-costs.c | 19 | ||||
-rw-r--r-- | gcc/ira.c | 12 |
3 files changed, 17 insertions, 22 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8789afa..5239357 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2018-12-06 Vladimir Makarov <vmakarov@redhat.com> + + PR target/88282 + * ira.c (ira_init_register_move_cost): Use info from + hard_regno_mode_ok instead of contains_reg_of_mode. + * ira-costs.c (contains_reg_of_mode): Don't use cost from bigger + hard register class for some fixed hard registers. + 2018-12-06 Segher Boessenkool <segher@kernel.crashing.org> * doc/extend.texi (Using Assembly Language with C): Document asm inline. diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index c3451f0..d0f097b 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1323,14 +1323,6 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) move_costs = ira_register_move_cost[mode]; hard_reg_class = REGNO_REG_CLASS (other_regno); bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class]; - if (bigger_hard_reg_class == NO_REGS - && (other_regno == STACK_POINTER_REGNUM -#ifdef STATIC_CHAIN_REGNUM - || other_regno == STATIC_CHAIN_REGNUM -#endif - || other_regno == FRAME_POINTER_REGNUM - || other_regno == HARD_FRAME_POINTER_REGNUM)) - bigger_hard_reg_class = GENERAL_REGS; /* Target code may return any cost for mode which does not fit the the hard reg class (e.g. DImode for AREG on i386). Check this and use a bigger class to get the @@ -1345,17 +1337,6 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref) cost = (i == 0 ? move_costs[hard_reg_class][rclass] : move_costs[rclass][hard_reg_class]); - /* Target code might define wrong big costs for smaller - reg classes or reg classes containing only fixed hard - regs. Try a bigger class. */ - if (bigger_hard_reg_class != hard_reg_class) - { - int cost2 = (i == 0 - ? move_costs[bigger_hard_reg_class][rclass] - : move_costs[rclass][bigger_hard_reg_class]); - if (cost2 < cost) - cost = cost2; - } op_costs[i]->cost[k] = cost * frequency; /* If we have assigned a class to this allocno in our @@ -1573,11 +1573,17 @@ ira_init_register_move_cost (machine_mode mode) { static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES]; bool all_match = true; - unsigned int cl1, cl2; + unsigned int i, cl1, cl2; + HARD_REG_SET ok_regs; ira_assert (ira_register_move_cost[mode] == NULL && ira_may_move_in_cost[mode] == NULL && ira_may_move_out_cost[mode] == NULL); + CLEAR_HARD_REG_SET (ok_regs); + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + if (targetm.hard_regno_mode_ok (i, mode)) + SET_HARD_REG_BIT (ok_regs, i); + /* Note that we might be asked about the move costs of modes that cannot be stored in any hard register, for example if an inline asm tries to create a register operand with an impossible mode. @@ -1586,8 +1592,8 @@ ira_init_register_move_cost (machine_mode mode) for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) { int cost; - if (!contains_reg_of_mode[cl1][mode] - || !contains_reg_of_mode[cl2][mode]) + if (!hard_reg_set_intersect_p (ok_regs, reg_class_contents[cl1]) + || !hard_reg_set_intersect_p (ok_regs, reg_class_contents[cl2])) { if ((ira_reg_class_max_nregs[cl1][mode] > ira_class_hard_regs_num[cl1]) |