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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-06-16 00:16:34 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-06-16 00:16:34 +0000 |
| commit | dff55a5a0e17f202814e432bdcc5917b65292b44 (patch) | |
| tree | 93c0b3e138335af4b38778f4c6b8b9b6c6aa4f6d /gcc | |
| parent | 079506b8aaff878cfc5506241909566f91c624c8 (diff) | |
| download | gcc-dff55a5a0e17f202814e432bdcc5917b65292b44.zip gcc-dff55a5a0e17f202814e432bdcc5917b65292b44.tar.gz gcc-dff55a5a0e17f202814e432bdcc5917b65292b44.tar.bz2 | |
Daily bump.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 13 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 33 |
3 files changed, 47 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3738050..6bf1de6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2024-06-15 Christoph Müllner <christoph.muellner@vrull.eu> + + * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch): + Fix allocation size of buffer. + (riscv_process_one_target_attr): Likewise. + (riscv_process_target_attr): Likewise. + +2024-06-15 Gerald Pfeifer <gerald@pfeifer.com> + + PR target/69374 + * doc/install.texi (Specific): Remove pointer to old versions + of binutils. + 2024-06-14 Andrew MacLeod <amacleod@redhat.com> * gimple-range-gori.cc (gori_calc_operands): Do not continue nor diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index c882ae5..85b77d0 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240615 +20240616 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b7bbf30..a491999 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,36 @@ +2024-06-15 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-5.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-6.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-7.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-8.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-5.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-6.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-7.c: New test. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-8.c: New test. + +2024-06-15 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: Leverage + the new header file for vector part. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-2.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-3.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-4.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-1.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-2.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-3.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-4.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-1.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-2.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-3.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-4.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-1.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-2.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-3.c: Ditto. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-4.c: Ditto. + * gcc.target/riscv/sat_arith.h: Move vector part out. + * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: New test. + 2024-06-14 Jakub Jelinek <jakub@redhat.com> * g++.dg/torture/vshuf-mem.C: Add -Wno-psabi to dg-options. |