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authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>2009-03-06 11:40:21 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2009-03-06 11:40:21 +0000
commitd8f8ca8097437d3d2296e4983dc2c5a522e6e3f9 (patch)
tree495ee37192716d12d0112c1ca6c6e1ce5a85f09d /gcc
parent6c3d550c4a934d9669455aa81836772b4520e39f (diff)
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Fix isr documentation for ARM
From-SVN: r144668
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/doc/extend.texi5
2 files changed, 10 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8809bb7..e6a3ba7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-03-06 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * doc/extend.texi (Function Attributes): Add documentation
+ for isr attributes.
+
2009-03-06 Jakub Jelinek <jakub@redhat.com>
PR debug/39387
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index f901db3..3d93010 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2436,6 +2436,11 @@ to run as a thread. The compiler omits generate prologue/epilogue
sequences and replaces the return instruction with a @code{sleep}
instruction. This attribute is available only on fido.
+@item isr
+@cindex interrupt service routines on ARM
+Use this attribute on ARM to write Interrupt Service Routines. This is an
+alias to the @code{interrupt} attribute above.
+
@item kspisusp
@cindex User stack pointer in interrupts on the Blackfin
When used together with @code{interrupt_handler}, @code{exception_handler}