diff options
| author | Stephane Carrez <Stephane.Carrez@worldnet.fr> | 2001-08-04 12:01:02 +0200 |
|---|---|---|
| committer | Stephane Carrez <ciceron@gcc.gnu.org> | 2001-08-04 12:01:02 +0200 |
| commit | d8de89e827441c22b129365aeb4f0a2626448aa5 (patch) | |
| tree | 3829c93306f8a49b1a6fb53a82267cec347bc38f /gcc | |
| parent | 34259cdc2a76f565a18ef4dbe31d43fae14c48d2 (diff) | |
| download | gcc-d8de89e827441c22b129365aeb4f0a2626448aa5.zip gcc-d8de89e827441c22b129365aeb4f0a2626448aa5.tar.gz gcc-d8de89e827441c22b129365aeb4f0a2626448aa5.tar.bz2 | |
m68hc11.md ("bitcmpqi"): Allow memory and soft register for operand 0.
* config/m68hc11/m68hc11.md ("bitcmpqi"): Allow memory and soft
register for operand 0.
("bitcmpqi_z_used"): Allow memory for operand 0.
(split "bitcmpqi"): New split to handle address reg as operand 1.
From-SVN: r44629
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/m68hc11/m68hc11.md | 33 |
2 files changed, 30 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92bf8d4..8a77fa0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2001-08-04 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * config/m68hc11/m68hc11.md ("bitcmpqi"): Allow memory and soft + register for operand 0. + ("bitcmpqi_z_used"): Allow memory for operand 0. + (split "bitcmpqi"): New split to handle address reg as operand 1. + 2001-08-04 Andreas Jaeger <aj@suse.de> * gcse.c: Revert Daniel's last patch. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 8392c2c..c87a218 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -385,28 +385,41 @@ (define_insn "bitcmpqi" [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d,d,d") - (match_operand:QI 1 "cmp_operand" "im,*A,u")))] + (and:QI (match_operand:QI 0 "tst_operand" "d,d,d,m,!u") + (match_operand:QI 1 "cmp_operand" "im,*B,u,d,d")))] "" "@ - bitb\\t%1 + bitb\\t%b1 # - bitb\\t%1") + bitb\\t%b1 + bitb\\t%b0 + bitb\\t%b0") -(define_insn "bitcmpqi_z_used" +(define_split /* "bitcmpqi" */ [(set (cc0) (and:QI (match_operand:QI 0 "tst_operand" "d") - (match_operand:QI 1 "cmp_operand" "m"))) - (use (match_operand:HI 2 "hard_reg_operand" "xy")) + (match_operand:QI 1 "hard_addr_reg_operand" "xy")))] + "z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode" + [(set (match_dup 3) (match_dup 2)) + (set (cc0) (and:QI (match_dup 0) (match_dup 4)))] + "operands[2] = gen_rtx (REG, HImode, REGNO (operands[1])); + operands[3] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM); + operands[4] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);") + +(define_insn "bitcmpqi_z_used" + [(set (cc0) + (and:QI (match_operand:QI 0 "tst_operand" "d,m") + (match_operand:QI 1 "cmp_operand" "m,d"))) + (use (match_operand:HI 2 "hard_reg_operand" "xy,xy")) (use (reg:HI 11))] "" "#") (define_split /* "bitcmpqi_z_used" */ [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d") - (match_operand:QI 1 "cmp_operand" "m"))) - (use (match_operand:HI 2 "hard_reg_operand" "xy")) + (and:QI (match_operand:QI 0 "tst_operand" "d,m") + (match_operand:QI 1 "cmp_operand" "m,d"))) + (use (match_operand:HI 2 "hard_reg_operand" "xy,xy")) (use (reg:HI 11))] "z_replacement_completed == 2" [(set (mem:HI (pre_dec:HI (reg:HI 3))) (match_dup 2)) |