alpha-modes.def: Fix comment formatting.

	* config/alpha/alpha-modes.def: Fix comment formatting.
	* config/alpha/alpha.c: Likewise.
	* config/alpha/alpha.h: Likewise.
	* config/alpha/elf.h: Likewise.
	* config/alpha/lib1funcs.asm: Likewise.
	* config/alpha/openbsd.h: Likewise.
	* config/alpha/vms-cc.c: Likewise.
	* config/alpha/vms-crt0-64.c: Likewise.
	* config/alpha/vms-crt0.c: Likewise.
	* config/alpha/vms-ld.c: Likewise.
	* config/alpha/vms-psxcrt0-64.c: Likewise.
	* config/alpha/vms-psxcrt0.c: Likewise.
	* config/alpha/vms.h: Likewise.
	* config/arc/arc.c: Likewise.
	* config/arm/aof.h: Likewise.
	* config/arm/arm-modes.def: Likewise.
	* config/arm/arm.c: Likewise.
	* config/arm/arm.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/arm/linux-elf.h: Likewise.
	* config/arm/vxworks.h: Likewise.
	* config/avr/avr.c: Likewise.
	* config/avr/avr.h: Likewise.

From-SVN: r75019

24 files changed, 127 insertions, 101 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0dd837b..3006e1e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,29 @@
+2003-12-25  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/alpha/alpha-modes.def: Fix comment formatting.
+	* config/alpha/alpha.c: Likewise.
+	* config/alpha/alpha.h: Likewise.
+	* config/alpha/elf.h: Likewise.
+	* config/alpha/lib1funcs.asm: Likewise.
+	* config/alpha/openbsd.h: Likewise.
+	* config/alpha/vms-cc.c: Likewise.
+	* config/alpha/vms-crt0-64.c: Likewise.
+	* config/alpha/vms-crt0.c: Likewise.
+	* config/alpha/vms-ld.c: Likewise.
+	* config/alpha/vms-psxcrt0-64.c: Likewise.
+	* config/alpha/vms-psxcrt0.c: Likewise.
+	* config/alpha/vms.h: Likewise.
+	* config/arc/arc.c: Likewise.
+	* config/arm/aof.h: Likewise.
+	* config/arm/arm-modes.def: Likewise.
+	* config/arm/arm.c: Likewise.
+	* config/arm/arm.h: Likewise.
+	* config/arm/arm.md: Likewise.
+	* config/arm/linux-elf.h: Likewise.
+	* config/arm/vxworks.h: Likewise.
+	* config/avr/avr.c: Likewise.
+	* config/avr/avr.h: Likewise.
+
 2003-12-24  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/xtensa/elf.h: Fix comment formatting.
diff --git a/gcc/config/alpha/alpha-modes.def b/gcc/config/alpha/alpha-modes.def
index b3747a1..8e9e698 100644
--- a/gcc/config/alpha/alpha-modes.def
+++ b/gcc/config/alpha/alpha-modes.def
@@ -19,5 +19,5 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
 /* 128-bit floating point.  This gets reset in alpha_override_options
-   if VAX float format is in use. */
+   if VAX float format is in use.  */
 FLOAT_MODE (TF, 16, ieee_quad_format);
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 26d6fbb..87408d6 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -5125,7 +5125,7 @@ alpha_multipass_dfa_lookahead (void)
 
 struct machine_function GTY(())
 {
-  /* For unicosmk. */
+  /* For unicosmk.  */
   /* List of call information words for calls from this function.  */
   struct rtx_def *first_ciw;
   struct rtx_def *last_ciw;
@@ -5134,7 +5134,7 @@ struct machine_function GTY(())
   /* List of deferred case vectors.  */
   struct rtx_def *addr_list;
 
-  /* For OSF. */
+  /* For OSF.  */
   const char *some_ld_name;
 };
 
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 2855351..fac2772 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -818,7 +818,7 @@ enum reg_class {
 
    'U' is a symbolic operand.
 
-   'W' is a vector zero.   */
+   'W' is a vector zero.  */
 
 #define EXTRA_CONSTRAINT  alpha_extra_constraint
 
diff --git a/gcc/config/alpha/elf.h b/gcc/config/alpha/elf.h
index 7115bc0..34bba3e 100644
--- a/gcc/config/alpha/elf.h
+++ b/gcc/config/alpha/elf.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 You should have received a copy of the GNU General Public License
 along with GCC; see the file COPYING.  If not, write to
 the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.    */
+Boston, MA 02111-1307, USA.  */
 
 #undef OBJECT_FORMAT_COFF
 #undef EXTENDED_COFF
@@ -389,7 +389,7 @@ void FN (void)					\
 /* Provide a STARTFILE_SPEC appropriate for ELF.  Here we add the
    (even more) magical crtbegin.o file which provides part of the
    support for getting C++ file-scope static object constructed
-   before entering `main'.   */
+   before entering `main'.  */
 
 #undef	STARTFILE_SPEC
 #ifdef HAVE_LD_PIE
diff --git a/gcc/config/alpha/lib1funcs.asm b/gcc/config/alpha/lib1funcs.asm
index 6bea231..a2abb1f 100644
--- a/gcc/config/alpha/lib1funcs.asm
+++ b/gcc/config/alpha/lib1funcs.asm
@@ -307,7 +307,7 @@ $46:
    conventions.  */
 #if TYPE == UNSIGNED && SIZE == 32
 	/* This could be avoided by adding some CPP hair to the divide loop.
-	   It is probably not worth the added complexity.    */
+	   It is probably not worth the added complexity.  */
 	addl	RETREG,0,RETREG
 #endif
 
diff --git a/gcc/config/alpha/openbsd.h b/gcc/config/alpha/openbsd.h
index 45f627d..b9df2e4 100644
--- a/gcc/config/alpha/openbsd.h
+++ b/gcc/config/alpha/openbsd.h
@@ -72,7 +72,7 @@ Boston, MA 02111-1307, USA.  */
 /* Assembler format: exception region output.  */
 
 /* All configurations that don't use elf must be explicit about not using
-   dwarf unwind information. */
+   dwarf unwind information.  */
 #ifdef INCOMING_RETURN_ADDR_RTX
 #undef DWARF2_UNWIND_INFO
 #define DWARF2_UNWIND_INFO 0
diff --git a/gcc/config/alpha/vms-cc.c b/gcc/config/alpha/vms-cc.c
index 8dd12da..672a30f 100644
--- a/gcc/config/alpha/vms-cc.c
+++ b/gcc/config/alpha/vms-cc.c
@@ -49,22 +49,22 @@ static char *default_defines = (char *) "";
 static char *defines;
 
 /* Translate a Unix syntax directory specification into VMS syntax.
-   If indicators of VMS syntax found, return input string. */
+   If indicators of VMS syntax found, return input string.  */
 static char *to_host_dir_spec (char *);
 
 /* Translate a Unix syntax file specification into VMS syntax.
-   If indicators of VMS syntax found, return input string. */
+   If indicators of VMS syntax found, return input string.  */
 static char *to_host_file_spec (char *);
 
-/* Add a translated arg to the list to be passed to DEC CC */
+/* Add a translated arg to the list to be passed to DEC CC.  */
 static void addarg (const char *);
 
 /* Preprocess the number of args in P_ARGC and contained in ARGV.
-   Look for special flags, etc. that must be handled first. */
+   Look for special flags, etc. that must be handled first.  */
 static void preprocess_args (int *, char **);
 
 /* Process the number of args in P_ARGC and contained in ARGV. Look
-   for special flags, etc. that must be handled for the VMS compiler. */
+   for special flags, etc. that must be handled for the VMS compiler.  */
 static void process_args (int *, char **);
 
 /* Action routine called by decc$to_vms */
diff --git a/gcc/config/alpha/vms-crt0-64.c b/gcc/config/alpha/vms-crt0-64.c
index 845059c..9792f92 100644
--- a/gcc/config/alpha/vms-crt0-64.c
+++ b/gcc/config/alpha/vms-crt0-64.c
@@ -77,7 +77,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6)
 
 #pragma __pointer_size long
 
-  /* Reallocate argv with 64 bit pointers. */
+  /* Reallocate argv with 64 bit pointers.  */
   long_argv = (char **) malloc (sizeof (char *) * (argc + 1));
 
   for (i = 0; i < argc; i++)
diff --git a/gcc/config/alpha/vms-crt0.c b/gcc/config/alpha/vms-crt0.c
index a3c1310..88896c63 100644
--- a/gcc/config/alpha/vms-crt0.c
+++ b/gcc/config/alpha/vms-crt0.c
@@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C.
 #else
 
 /* This file can only be compiled with DEC C, due to the call to
-   lib$establish. */
+   lib$establish.  */
 
 #include <stdlib.h>
 #include <string.h>
diff --git a/gcc/config/alpha/vms-ld.c b/gcc/config/alpha/vms-ld.c
index bb7495e..cb1d4c9 100644
--- a/gcc/config/alpha/vms-ld.c
+++ b/gcc/config/alpha/vms-ld.c
@@ -44,7 +44,7 @@ static char *vmsdwarf2spec = 0;
 /* File specification for vms-dwarf2eh.o.  */
 static char *vmsdwarf2ehspec = 0;
 
-/* verbose = 1 if -v passed.   */
+/* verbose = 1 if -v passed.  */
 static int verbose = 0;
 
 /* save_temps = 1 if -save-temps passed.  */
@@ -95,10 +95,10 @@ static void addarg (const char *);
 static int is_regular_file (char *);
 
 /* Translate a Unix syntax file specification FILESPEC into VMS syntax.
-   If indicators of VMS syntax found, return input string. */
+   If indicators of VMS syntax found, return input string.  */
 static char *to_host_file_spec (char *);
 
-/* Locate the library named LIB_NAME in the set of paths PATH_VAL. */
+/* Locate the library named LIB_NAME in the set of paths PATH_VAL.  */
 static char *locate_lib (char *, char *);
 
 /* Given a library name NAME, i.e. foo,  Look for libfoo.lib and then
@@ -106,15 +106,15 @@ static char *locate_lib (char *, char *);
 static const char *expand_lib (char *);
 
 /* Preprocess the number of args P_ARGC in ARGV.
-   Look for special flags, etc. that must be handled first. */
+   Look for special flags, etc. that must be handled first.  */
 static void preprocess_args (int *, char **);
 
 /* Preprocess the number of args P_ARGC in ARGV.  Look for
-   special flags, etc. that must be handled for the VMS linker. */
+   special flags, etc. that must be handled for the VMS linker.  */
 static void process_args (int *, char **);
 
 /* Action routine called by decc$to_vms. NAME is a file name or
-   directory name. TYPE is unused. */
+   directory name. TYPE is unused.  */
 static int translate_unix (char *, int);
 
 int main (int, char **);
diff --git a/gcc/config/alpha/vms-psxcrt0-64.c b/gcc/config/alpha/vms-psxcrt0-64.c
index 7f93392..8ca9e1d 100644
--- a/gcc/config/alpha/vms-psxcrt0-64.c
+++ b/gcc/config/alpha/vms-psxcrt0-64.c
@@ -79,7 +79,7 @@ __main (arg1, arg2, arg3, image_file_desc, arg5, arg6)
 
 #pragma __pointer_size long
 
-  /* Reallocate argv with 64 bit pointers. */
+  /* Reallocate argv with 64 bit pointers.  */
   long_argv = (char **) malloc (sizeof (char *) * (argc + 1));
 
   for (i = 0; i < argc; i++)
diff --git a/gcc/config/alpha/vms-psxcrt0.c b/gcc/config/alpha/vms-psxcrt0.c
index 1b51f6d..65962ee 100644
--- a/gcc/config/alpha/vms-psxcrt0.c
+++ b/gcc/config/alpha/vms-psxcrt0.c
@@ -33,7 +33,7 @@ You Lose! This file can only be compiled with DEC C.
 #else
 
 /* This file can only be compiled with DEC C, due to the call to
-   lib$establish. */
+   lib$establish.  */
 
 #include <stdlib.h>
 #include <string.h>
diff --git a/gcc/config/alpha/vms.h b/gcc/config/alpha/vms.h
index 192e178..338ed55 100644
--- a/gcc/config/alpha/vms.h
+++ b/gcc/config/alpha/vms.h
@@ -422,7 +422,7 @@ do {									\
 }
 
 /* Link with vms-dwarf2.o if -g (except -g0). This causes the
-   VMS link to pull all the dwarf2 debug sections together. */
+   VMS link to pull all the dwarf2 debug sections together.  */
 #undef LINK_SPEC
 #define LINK_SPEC "%{g:-g vms-dwarf2.o%s} %{g0} %{g1:-g1 vms-dwarf2.o%s} \
 %{g2:-g2 vms-dwarf2.o%s} %{g3:-g3 vms-dwarf2.o%s} %{shared} %{v} %{map}"
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 7cf119e..876bef5 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -1047,7 +1047,7 @@ arc_compute_function_type (tree decl)
    SIZE is the size needed for local variables.  */
 
 unsigned int
-arc_compute_frame_size (int size /* # of var. bytes allocated. */)
+arc_compute_frame_size (int size /* # of var. bytes allocated.  */)
 {
   int regno;
   unsigned int total_size, var_size, args_size, pretend_size, extra_size;
diff --git a/gcc/config/arm/aof.h b/gcc/config/arm/aof.h
index 2650a0e..5a6ab2c 100644
--- a/gcc/config/arm/aof.h
+++ b/gcc/config/arm/aof.h
@@ -133,7 +133,7 @@
 /* Some systems use __main in a way incompatible with its use in gcc, in these
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
    give the same symbol without quotes for an alternative entry point.  You
-   must define both, or neither. */
+   must define both, or neither.  */
 #define NAME__MAIN "__gccmain"
 #define SYMBOL__MAIN __gccmain
 
@@ -290,7 +290,7 @@ do {					\
 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)	\
   fprintf ((STREAM), "\tDCD\t|L..%d|\n", (VALUE))
 
-/* A label marking the start of a jump table is a data label. */
+/* A label marking the start of a jump table is a data label.  */
 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE)	\
   fprintf ((STREAM), "\tALIGN\n|%s..%d|\n", (PREFIX), (NUM))
 
diff --git a/gcc/config/arm/arm-modes.def b/gcc/config/arm/arm-modes.def
index 1d58b18..b853551 100644
--- a/gcc/config/arm/arm-modes.def
+++ b/gcc/config/arm/arm-modes.def
@@ -31,7 +31,7 @@ FLOAT_MODE (XF, 12, 0);
    CC_NOOVmode should be used with SImode integer equalities.
    CC_Zmode should be used if only the Z flag is set correctly
    CC_Nmode should be used if only the N (sign) flag is set correctly
-   CCmode should be used otherwise. */
+   CCmode should be used otherwise.  */
 
 CC_MODE (CC_NOOV);
 CC_MODE (CC_Z);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 936f3e8..c8dc024 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -854,7 +854,7 @@ arm_override_options (void)
       arm_constant_limit = 1;
 
       /* If optimizing for size, bump the number of instructions that we
-         are prepared to conditionally execute (even on a StrongARM). */
+         are prepared to conditionally execute (even on a StrongARM).  */
       max_insns_skipped = 6;
     }
   else
@@ -867,7 +867,7 @@ arm_override_options (void)
 
       /* On XScale the longer latency of a load makes it more difficult
          to achieve a good schedule, so it's faster to synthesize
-	 constants that can be done in two insns. */
+	 constants that can be done in two insns.  */
       if (arm_tune_xscale)
         arm_constant_limit = 2;
 
@@ -1061,13 +1061,13 @@ use_return_insn (int iscond, rtx sibling)
   if (stack_adjust == 4 && !arm_arch5)
     {
       /* Validate that r3 is a call-clobbered register (always true in
-	 the default abi) ... */
+	 the default abi) ...  */
       if (!call_used_regs[3])
 	return 0;
 
       /* ... that it isn't being used for a return value (always true
 	 until we implement return-in-regs), or for a tail-call
-	 argument ... */
+	 argument ...  */
       if (sibling)
 	{
 	  if (GET_CODE (sibling) != CALL_INSN)
@@ -2008,7 +2008,7 @@ arm_return_in_memory (tree type)
   return 1;
 }
 
-/* Indicate whether or not words of a double are in big-endian order. */
+/* Indicate whether or not words of a double are in big-endian order.  */
 
 int
 arm_float_words_big_endian (void)
@@ -3200,7 +3200,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
 	case AND:
 	case XOR:
 	case IOR: 
-	  /* XXX guess. */
+	  /* XXX guess.  */
 	  return 8;
 
 	case ADDRESSOF:
@@ -3213,7 +3213,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
 		     ? 4 : 0));
 
 	case IF_THEN_ELSE:
-	  /* XXX a guess. */
+	  /* XXX a guess.  */
 	  if (GET_CODE (XEXP (x, 1)) == PC || GET_CODE (XEXP (x, 2)) == PC)
 	    return 14;
 	  return 2;
@@ -3396,11 +3396,11 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
 	      unsigned HOST_WIDE_INT masked_const;
 
 	      /* The cost will be related to two insns.
-		 First a load of the constant (MOV or LDR), then a multiply. */
+		 First a load of the constant (MOV or LDR), then a multiply.  */
 	      cost = 2;
 	      if (! const_ok)
 		cost += 1;      /* LDR is probably more expensive because
-				   of longer result latency. */
+				   of longer result latency.  */
 	      masked_const = i & 0xffff8000;
 	      if (masked_const != 0 && masked_const != 0xffff8000)
 		{
@@ -3533,7 +3533,7 @@ arm_rtx_costs (rtx x, int code, int outer_code, int *total)
 /* All address computations that can be done are free, but rtx cost returns
    the same for practically all of them.  So we weight the different types
    of address here in the order (most pref first):
-   PRE/POST_INC/DEC, SHIFT or NON-INT sum, INT sum, REG, MEM or LABEL. */
+   PRE/POST_INC/DEC, SHIFT or NON-INT sum, INT sum, REG, MEM or LABEL.  */
 static inline int
 arm_arm_address_cost (rtx x)
 {
@@ -8027,7 +8027,7 @@ output_ascii_pseudo_op (FILE *stream, const unsigned char *p, int len)
 	case '\\':
 	  putc ('\\', stream);
 	  len_so_far++;
-	  /* drop through.  */
+	  /* Drop through.  */
 
 	default:
 	  if (c >= ' ' && c <= '~')
@@ -9848,7 +9848,7 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
       output_addr_const (asm_out_file, x);
 
       /* Mark symbols as position independent.  We only do this in the
-	 .text segment, not in the .data segment. */
+	 .text segment, not in the .data segment.  */
       if (NEED_GOT_RELOC && flag_pic && making_const_table &&
 	  (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF))
 	{
@@ -10359,7 +10359,7 @@ arm_final_prescan_insn (rtx insn)
 	        }
 	      if (!this_insn)
 	        {
-		  /* Oh, dear! we ran off the end.. give up */
+		  /* Oh, dear! we ran off the end.. give up.  */
 		  recog (PATTERN (insn), insn, NULL);
 		  arm_ccfsm_state = 0;
 		  arm_target_insn = NULL;
@@ -10536,7 +10536,7 @@ arm_debugger_arg_offset (int value, rtx addr)
      which is the frame pointer
      a constant integer
 
-     then... */
+     then...  */
   
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
@@ -11864,7 +11864,7 @@ is_called_in_ARM_mode (tree func)
 #endif
 }
 
-/* The bits which aren't usefully expanded as rtl. */
+/* The bits which aren't usefully expanded as rtl.  */
 const char *
 thumb_unexpanded_epilogue (void)
 {
@@ -11949,7 +11949,7 @@ thumb_unexpanded_epilogue (void)
 
 	  mask &= (2 << regno) - 1;	/* A noop if regno == 8 */
 
-	  /* Pop the values into the low register(s). */
+	  /* Pop the values into the low register(s).  */
 	  thumb_pushpop (asm_out_file, mask, 0);
 
 	  /* Move the value(s) into the high registers.  */
@@ -11977,7 +11977,7 @@ thumb_unexpanded_epilogue (void)
     {
       /* The stack backtrace structure creation code had to
 	 push R7 in order to get a work register, so we pop
-	 it now.   */
+	 it now.  */
       live_regs_mask |= (1 << LAST_LO_REGNUM);
     }
   
@@ -12332,7 +12332,7 @@ thumb_output_function_prologue (FILE *f, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
 	 the assembler to bypass the ARM code when this function
 	 is called from a Thumb encoded function elsewhere in the
 	 same file.  Hence the definition of STUB_NAME here must
-	 agree with the definition in gas/config/tc-arm.c  */
+	 agree with the definition in gas/config/tc-arm.c.  */
       
 #define STUB_NAME ".real_start_of"
       
@@ -12407,7 +12407,7 @@ thumb_output_function_prologue (FILE *f, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
 
 	  if (regs_ever_live [LAST_ARG_REGNUM] == 0)
 	    work_register = LAST_ARG_REGNUM;
-	  else	  /* We must push a register of our own */
+	  else	  /* We must push a register of our own.  */
 	    live_regs_mask |= (1 << LAST_LO_REGNUM);
 	}
 
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 5c4a9b8..9cc35f4 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -130,12 +130,12 @@ extern GTY(()) rtx arm_compare_op1;
 /* The label of the current constant pool.  */
 extern rtx pool_vector_label;
 /* Set to 1 when a return insn is output, this means that the epilogue
-   is not needed. */
+   is not needed.  */
 extern int return_used_this_function;
 /* Used to produce AOF syntax assembler.  */
 extern GTY(()) rtx aof_pic_label;
 
-/* Just in case configure has failed to define anything. */
+/* Just in case configure has failed to define anything.  */
 #ifndef TARGET_CPU_DEFAULT
 #define TARGET_CPU_DEFAULT TARGET_CPU_generic
 #endif
@@ -371,7 +371,7 @@ extern GTY(()) rtx aof_pic_label;
    function tries to return.  */
 #define ARM_FLAG_ABORT_NORETURN	(1 << 13)
 
-/* Nonzero if function prologues should not load the PIC register. */
+/* Nonzero if function prologues should not load the PIC register.  */
 #define ARM_FLAG_SINGLE_PIC_BASE (1 << 14)
 
 /* Nonzero if all call instructions should be indirect.  */
@@ -571,7 +571,7 @@ enum prog_mode_type
   prog_mode32
 };
 
-/* Recast the program mode class to be the prog_mode attribute */
+/* Recast the program mode class to be the prog_mode attribute.  */
 #define arm_prog_mode ((enum attr_prog_mode) arm_prgmode)
 
 extern enum prog_mode_type arm_prgmode;
@@ -920,7 +920,7 @@ extern const char * structure_size_string;
    and the register where structure-value addresses are passed.
    Aside from that, you can include as many other registers as you like.
    The CC is not preserved over function calls on the ARM 6, so it is 
-   easier to assume this for all.  SFP is preserved, since FP is. */
+   easier to assume this for all.  SFP is preserved, since FP is.  */
 #define CALL_USED_REGISTERS  \
 {                            \
   1,1,1,1,0,0,0,0,	     \
@@ -953,7 +953,7 @@ extern const char * structure_size_string;
     {								\
       /* When optimizing for size, it's better not to use	\
 	 the HI regs, because of the overhead of stacking 	\
-	 them. */						\
+	 them.  */						\
       for (regno = FIRST_HI_REGNUM;				\
 	   regno <= LAST_HI_REGNUM; ++regno)			\
 	fixed_regs[regno] = call_used_regs[regno] = 1;		\
@@ -1233,7 +1233,7 @@ enum reg_class
 
 #define N_REG_CLASSES  (int) LIM_REG_CLASSES
 
-/* Give names of register classes as strings for dump file.   */
+/* Give names of register classes as strings for dump file.  */
 #define REG_CLASS_NAMES  \
 {			\
   "NO_REGS",		\
@@ -1297,7 +1297,7 @@ enum reg_class
 /* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
    registers explicitly used in the rtl to be used as spill registers
    but prevents the compiler from extending the lifetime of these
-   registers. */
+   registers.  */
 #define SMALL_REGISTER_CLASSES   TARGET_THUMB
 
 /* Get reg_class from a letter such as appears in the machine description.
@@ -1364,7 +1364,7 @@ enum reg_class
    an offset from a register.  
    `S' means any symbol that has the SYMBOL_REF_FLAG set or a CONSTANT_POOL
    address.  This means that the symbol is in the text segment and can be
-   accessed without using a load. */
+   accessed without using a load.  */
 
 #define EXTRA_CONSTRAINT_ARM(OP, C)					    \
   ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG :    \
@@ -1415,7 +1415,7 @@ enum reg_class
     ? GENERAL_REGS : NO_REGS)					\
    : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))
    
-/* If we need to load shorts byte-at-a-time, then we need a scratch. */
+/* If we need to load shorts byte-at-a-time, then we need a scratch.  */
 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)		\
   /* Cannot load constants into Cirrus registers.  */		\
   ((TARGET_CIRRUS						\
@@ -1569,7 +1569,7 @@ enum reg_class
 /* If we generate an insn to push BYTES bytes,
    this says how many the stack pointer really advances by.  */
 /* The push insns do not do this rounding implicitly.
-   So don't define this. */
+   So don't define this.  */
 /* #define PUSH_ROUNDING(NPUSHED)  ROUND_UP_WORD (NPUSHED) */
 
 /* Define this if the maximum size of all the outgoing args is to be
@@ -1620,12 +1620,12 @@ enum reg_class
 
 /* How large values are returned */
 /* A C expression which can inhibit the returning of certain function values
-   in registers, based on the type of value. */
+   in registers, based on the type of value.  */
 #define RETURN_IN_MEMORY(TYPE) arm_return_in_memory (TYPE)
 
 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
    values must be in memory.  On the ARM, they need only do so if larger
-   than a word, or if they contain elements offset from zero in the struct. */
+   than a word, or if they contain elements offset from zero in the struct.  */
 #define DEFAULT_PCC_STRUCT_RETURN 0
 
 /* Flags for the call/call_value rtl operations set up by function_arg.  */
@@ -1659,7 +1659,7 @@ enum reg_class
 #define ARM_FT_INTERRUPT	(1 << 2) /* Note overlap with FT_ISR and above.  */
 #define ARM_FT_NAKED		(1 << 3) /* No prologue or epilogue.  */
 #define ARM_FT_VOLATILE		(1 << 4) /* Does not return.  */
-#define ARM_FT_NESTED		(1 << 5) /* Embedded inside another func. */
+#define ARM_FT_NESTED		(1 << 5) /* Embedded inside another func.  */
 
 /* Some macros to test these flags.  */
 #define ARM_FUNC_TYPE(t)	(t & ARM_FT_TYPE_MASK)
@@ -1703,7 +1703,7 @@ typedef struct
   int iwmmxt_nregs;
   int named_count;
   int nargs;
-  /* One of CALL_NORMAL, CALL_LONG or CALL_SHORT . */
+  /* One of CALL_NORMAL, CALL_LONG or CALL_SHORT.  */
   int call_cookie;
 } CUMULATIVE_ARGS;
 
@@ -2055,7 +2055,7 @@ typedef struct
    They give nonzero only if REGNO is a hard reg of the suitable class
    or a pseudo reg currently allocated to a suitable hard reg.
    Since they use reg_renumber, they are safe only once reg_renumber
-   has been allocated, which happens in local-alloc.c. */
+   has been allocated, which happens in local-alloc.c.  */
 #define TEST_REGNO(R, TEST, VALUE) \
   ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
 
@@ -2081,7 +2081,7 @@ typedef struct
   REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode)
 
 /* Maximum number of registers that can appear in a valid memory address.
-   Shifts in addresses can't be by a register. */
+   Shifts in addresses can't be by a register.  */
 #define MAX_REGS_PER_ADDRESS 2
 
 /* Recognize any constant value that is a valid address.  */
@@ -2289,7 +2289,7 @@ do {							\
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
    table.
-   Do not define this if the table should contain absolute addresses. */
+   Do not define this if the table should contain absolute addresses.  */
 /* #define CASE_VECTOR_PC_RELATIVE 1 */
 
 /* signed 'char' is most compatible, but RISC OS wants it unsigned.
@@ -2334,7 +2334,7 @@ do {							\
 /* This is all wrong.  Defining SHIFT_COUNT_TRUNCATED tells combine that
    code like (X << (Y % 32)) for register X, Y is equivalent to (X << Y).
    On the arm, Y in a register is used modulo 256 for the shift. Only for
-   rotates is modulo 32 used. */
+   rotates is modulo 32 used.  */
 /* #define SHIFT_COUNT_TRUNCATED 1 */
 
 /* All integers have the same format so truncation is easy.  */
@@ -2402,7 +2402,7 @@ extern int making_const_table;
   c_register_pragma (0, "long_calls_off", arm_pr_long_calls_off);	\
 } while (0)
 
-/* Condition code information. */
+/* Condition code information.  */
 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
    return the mode to be used for the comparison.  */
 
@@ -2553,8 +2553,8 @@ extern int making_const_table;
 	HOST_WIDE_INT offset = 0;					\
 	if (GET_CODE (base) != REG)					\
 	  {								\
-	    /* Ensure that BASE is a register */			\
-            /* (one of them must be). */				\
+	    /* Ensure that BASE is a register.  */			\
+            /* (one of them must be).  */				\
 	    rtx temp = base;						\
 	    base = index;						\
 	    index = temp;						\
@@ -2743,7 +2743,7 @@ extern int making_const_table;
 /* Define this if you have special predicates that know special things
    about modes.  Genrecog will warn about certain forms of
    match_operand without a mode; if the operand predicate is listed in
-   SPECIAL_MODE_PREDICATES, the warning will be suppressed. */
+   SPECIAL_MODE_PREDICATES, the warning will be suppressed.  */
 #define SPECIAL_MODE_PREDICATES			\
  "cc_register", "dominant_cc_register",
 
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index d45b071..a6d6d2f 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3545,7 +3545,7 @@
 	(sign_extend:HI (match_operand:QI 1 "memory_operand"      "m")))]
   "TARGET_ARM && arm_arch4"
   "*
-  /* If the address is invalid, this will split the instruction into two. */
+  /* If the address is invalid, this will split the instruction into two.  */
   if (bad_signed_byte_operand (operands[1], VOIDmode))
     return \"#\";
   return \"ldr%?sb\\t%0, %1\";
@@ -3581,7 +3581,7 @@
 	XEXP (operands[2], 0) = plus_constant (operands[3], low);
 	operands[1] = plus_constant (XEXP (operands[1], 0), offset - low);
       }
-    /* Ensure the sum is in correct canonical form */
+    /* Ensure the sum is in correct canonical form.  */
     else if (GET_CODE (operands[1]) == PLUS
 	     && GET_CODE (XEXP (operands[1], 1)) != CONST_INT
 	     && !s_register_operand (XEXP (operands[1], 1), VOIDmode))
@@ -3643,7 +3643,7 @@
 	(sign_extend:SI (match_operand:QI 1 "memory_operand"      "m")))]
   "TARGET_ARM && arm_arch4"
   "*
-  /* If the address is invalid, this will split the instruction into two. */
+  /* If the address is invalid, this will split the instruction into two.  */
   if (bad_signed_byte_operand (operands[1], VOIDmode))
     return \"#\";
   return \"ldr%?sb\\t%0, %1\";
@@ -3678,7 +3678,7 @@
 	XEXP (operands[2], 0) = plus_constant (operands[0], low);
 	operands[1] = plus_constant (XEXP (operands[1], 0), offset - low);
       }
-    /* Ensure the sum is in correct canonical form */
+    /* Ensure the sum is in correct canonical form.  */
     else if (GET_CODE (operands[1]) == PLUS
 	     && GET_CODE (XEXP (operands[1], 1)) != CONST_INT
 	     && !s_register_operand (XEXP (operands[1], 1), VOIDmode))
@@ -3918,7 +3918,7 @@
   "
   if (TARGET_ARM)
     {
-      /* Everything except mem = const or mem = mem can be done easily */
+      /* Everything except mem = const or mem = mem can be done easily.  */
       if (GET_CODE (operands[0]) == MEM)
         operands[1] = force_reg (SImode, operands[1]);
       if (GET_CODE (operands[1]) == CONST_INT
@@ -3932,7 +3932,7 @@
           DONE;
         }
     }
-  else /* TARGET_THUMB.... */
+  else /* TARGET_THUMB....  */
     {
       if (!no_new_pseudos)
         {
@@ -4419,7 +4419,7 @@
 	       }
 	   }
         }
-      /* Handle loading a large integer during reload */
+      /* Handle loading a large integer during reload.  */
       else if (GET_CODE (operands[1]) == CONST_INT
 	       && !const_ok_for_arm (INTVAL (operands[1]))
 	       && !const_ok_for_arm (~INTVAL (operands[1])))
@@ -4463,7 +4463,7 @@
 	      = replace_equiv_address (operands[1],
 				       copy_to_reg (XEXP (operands[1], 0)));
         }
-      /* Handle loading a large integer during reload */
+      /* Handle loading a large integer during reload.  */
       else if (GET_CODE (operands[1]) == CONST_INT
 	        && !CONST_OK_FOR_THUMB_LETTER (INTVAL (operands[1]), 'I'))
         {
@@ -4768,7 +4768,7 @@
 	       = replace_equiv_address (operands[1],
 					copy_to_reg (XEXP (operands[1], 0)));
         }
-      /* Handle loading a large integer during reload */
+      /* Handle loading a large integer during reload.  */
       else if (GET_CODE (operands[1]) == CONST_INT
 	       && !CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'I'))
         {
@@ -5167,7 +5167,7 @@
                      (use (match_operand:SI 2 "" ""))])]
   "TARGET_ARM"
   "
-  /* Support only fixed point registers */
+  /* Support only fixed point registers.  */
   if (GET_CODE (operands[2]) != CONST_INT
       || INTVAL (operands[2]) > 14
       || INTVAL (operands[2]) < 2
@@ -7023,7 +7023,7 @@
       FAIL;
 
     /* When compiling for SOFT_FLOAT, ensure both arms are in registers. 
-       Otherwise, ensure it is a valid FP add operand */
+       Otherwise, ensure it is a valid FP add operand.  */
     if ((!TARGET_HARD_FLOAT)
         || (!fpa_add_operand (operands[3], SFmode)))
       operands[3] = force_reg (SFmode, operands[3]);
@@ -8252,7 +8252,7 @@
 	  return \"bics\\t%0, %2, %3, asr #32\;movcs\\t%0, %1\";
 	}
       /* The only case that falls through to here is when both ops 1 & 2
-	 are constants */
+	 are constants.  */
     }
 
   if (GET_CODE (operands[5]) == GE
@@ -8271,7 +8271,7 @@
 	  return \"ands\\t%0, %2, %3, asr #32\;movcc\\t%0, %1\";
 	}
       /* The only case that falls through to here is when both ops 1 & 2
-	 are constants */
+	 are constants.  */
     }
   if (GET_CODE (operands[4]) == CONST_INT
       && !const_ok_for_arm (INTVAL (operands[4])))
@@ -8408,7 +8408,7 @@
   "*
   /* If we have an operation where (op x 0) is the identity operation and
      the conditional operator is LT or GE and we are comparing against zero and
-     everything is in registers then we can do this in two instructions */
+     everything is in registers then we can do this in two instructions.  */
   if (operands[3] == const0_rtx
       && GET_CODE (operands[7]) != AND
       && GET_CODE (operands[5]) == REG
diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h
index bcc9749..c9ac16b 100644
--- a/gcc/config/arm/linux-elf.h
+++ b/gcc/config/arm/linux-elf.h
@@ -58,7 +58,7 @@
 /* Provide a STARTFILE_SPEC appropriate for GNU/Linux.  Here we add
    the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
    provides part of the support for getting C++ file-scope static
-   object constructed before entering `main'. */
+   object constructed before entering `main'.  */
    
 #undef  STARTFILE_SPEC
 #define STARTFILE_SPEC \
diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h
index a5a6a09..afe6b70 100644
--- a/gcc/config/arm/vxworks.h
+++ b/gcc/config/arm/vxworks.h
@@ -68,7 +68,7 @@ Boston, MA 02111-1307, USA.  */
 #define LIB_SPEC 	""
 
 /* VxWorks uses object files, not loadable images.  make linker just
-   combine objects. */
+   combine objects.  */
 #undef  LINK_SPEC
 #define LINK_SPEC 	"-r"
 
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index b149e7e..216ec86 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -4215,7 +4215,7 @@ adjust_insn_length (rtx insn, int len)
   return len;
 }
 
-/* Return nonzero if register REG dead after INSN. */
+/* Return nonzero if register REG dead after INSN.  */
 
 int
 reg_unused_after (rtx insn, rtx reg)
@@ -4383,7 +4383,7 @@ avr_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
    generated assembly code more compact (and thus faster to assemble)
    as well as more readable, especially for targets like the i386
    (where the only alternative is to output character sequences as
-   comma separated lists of numbers).   */
+   comma separated lists of numbers).  */
 
 void
 gas_output_limited_string(FILE *file, const char *str)
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index eae93e5..0d5cd7c 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -20,7 +20,7 @@ along with GCC; see the file COPYING.  If not, write to
 the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
-/* Names to predefine in the preprocessor for this target machine. */
+/* Names to predefine in the preprocessor for this target machine.  */
 
 #define TARGET_CPU_CPP_BUILTINS()		\
   do						\
@@ -41,7 +41,7 @@ Boston, MA 02111-1307, USA.  */
     }						\
   while (0)
 
-/* This declaration should be present. */
+/* This declaration should be present.  */
 extern int target_flags;
 
 #define MASK_ALL_DEBUG		0x00000FE0
@@ -130,10 +130,10 @@ extern int avr_asm_only_p;
    frame pointer.  If this macro is defined, GCC will turn on the
    `-fomit-frame-pointer' option whenever `-O' is specified.  */
 
-/* Define this if most significant byte of a word is the lowest numbered. */
+/* Define this if most significant byte of a word is the lowest numbered.  */
 #define BITS_BIG_ENDIAN 0
 
-/* Define this if most significant byte of a word is the lowest numbered. */
+/* Define this if most significant byte of a word is the lowest numbered.  */
 #define BYTES_BIG_ENDIAN 0
 
 /* Define this if most significant word of a multiword number is the lowest
@@ -144,7 +144,7 @@ extern int avr_asm_only_p;
 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 #define UNITS_PER_WORD 4
 #else
-/* Width of a word, in units (bytes). */
+/* Width of a word, in units (bytes).  */
 #define UNITS_PER_WORD 1
 #endif
 
@@ -157,16 +157,16 @@ extern int avr_asm_only_p;
    DImode or Dfmode ...  */
 #define MAX_FIXED_MODE_SIZE 32
 
-/* Allocation boundary (in *bits*) for storing arguments in argument list. */
+/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 #define PARM_BOUNDARY 8
 
-/* Allocation boundary (in *bits*) for the code of a function. */
+/* Allocation boundary (in *bits*) for the code of a function.  */
 #define FUNCTION_BOUNDARY 8
 
-/* Alignment of field after `int : 0' in a structure. */
+/* Alignment of field after `int : 0' in a structure.  */
 #define EMPTY_FIELD_BOUNDARY 8
 
-/* No data type wants to be aligned rounder than this. */
+/* No data type wants to be aligned rounder than this.  */
 #define BIGGEST_ALIGNMENT 8
 
 
@@ -211,7 +211,7 @@ extern int avr_asm_only_p;
 #define DOUBLE_TYPE_SIZE 32
 /* A C expression for the size in bits of the type `double' on the
    target machine.  If you don't define this, the default is two
-   words. */
+   words.  */
 
 
 #define LONG_DOUBLE_TYPE_SIZE 32
@@ -366,7 +366,7 @@ extern int avr_asm_only_p;
    registers must always be saved and the save-multiple-registers
    instruction supports only sequences of consecutive registers.  On
    such machines, define `REG_ALLOC_ORDER' to be an initializer that
-   lists the highest numbered allocatable register first. */
+   lists the highest numbered allocatable register first.  */
 
 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
 /* ORDER_REGS_FOR_LOCAL_ALLOC'
@@ -1147,7 +1147,7 @@ typedef struct avr_args {
    contains the name of the function, as a string.  LIBNAME is 0 when
    an ordinary C function call is being processed.  Thus, each time
    this macro is called, either LIBNAME or FNTYPE is nonzero, but
-   never both of them at once.   */
+   never both of them at once.  */
 
 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	\
   (function_arg_advance (&CUM, MODE, TYPE, NAMED))
@@ -1160,7 +1160,7 @@ typedef struct avr_args {
 
    This macro need not do anything if the argument in question was
    passed on the stack.  The compiler knows how to track the amount
-   of stack space used for arguments without any special help. */
+   of stack space used for arguments without any special help.  */
 
 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 /* A C expression that is nonzero if REGNO is the number of a hard