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authorDorit Naishlos <dorit@il.ibm.com>2004-12-09 11:06:20 +0000
committerDorit Nuzman <dorit@gcc.gnu.org>2004-12-09 11:06:20 +0000
commitd16b59fa0c781e599115fad750585b2c4e42c71c (patch)
tree73dffeb9a21616d6d2e8d1fd2faac7d6f0751b1c /gcc
parent08f2586c92554b92c43ae5becc531807c927f75b (diff)
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genopinit.c (vec_realign_store_optab): Initialization removed.
2004-12-09 Dorit Naishlos <dorit@il.ibm.com> * genopinit.c (vec_realign_store_optab): Initialization removed. * optabs.c (optab_for_tree_code): REALIGN_STORE_EXPR case removed. * optabs.h (optab_index): OTI_vec_realign_store Removed. (vec_realign_store_optab): Removed. * target-def.h (TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE): Removed. * target.h (builtin_mask_for_store): Removed. * tree.def (REALIGN_STORE_EXPR): Removed. * config/rs6000/rs6000.c (rs6000_builtin_mask_for_store): Removed. (altivec_builtin_mask_for_store): Removed. (altivec_init_builtins): Removed initialization of altivec_builtin_mask_for_store. * doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): New. (TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD): New. From-SVN: r91932
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog17
-rw-r--r--gcc/config/rs6000/rs6000.c27
-rw-r--r--gcc/doc/tm.texi39
-rw-r--r--gcc/genopinit.c1
-rw-r--r--gcc/optabs.c3
-rw-r--r--gcc/optabs.h3
-rw-r--r--gcc/target-def.h4
-rw-r--r--gcc/target.h5
-rw-r--r--gcc/tree.def11
9 files changed, 59 insertions, 51 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e234897..ab6efa3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2004-12-09 Dorit Naishlos <dorit@il.ibm.com>
+
+ * genopinit.c (vec_realign_store_optab): Initialization removed.
+ * optabs.c (optab_for_tree_code): REALIGN_STORE_EXPR case removed.
+ * optabs.h (optab_index): OTI_vec_realign_store Removed.
+ (vec_realign_store_optab): Removed.
+ * target-def.h (TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE): Removed.
+ * target.h (builtin_mask_for_store): Removed.
+ * tree.def (REALIGN_STORE_EXPR): Removed.
+ * config/rs6000/rs6000.c (rs6000_builtin_mask_for_store): Removed.
+ (altivec_builtin_mask_for_store): Removed.
+ (altivec_init_builtins): Removed initialization of
+ altivec_builtin_mask_for_store.
+
+ * doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): New.
+ (TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD): New.
+
2004-12-09 Nathan Sidwell <nathan@codesourcery.com>
* tree.def (SET_TYPE): Remove.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 9c07a92..9a593fd 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -147,8 +147,6 @@ enum rs6000_nop_insertion rs6000_sched_insert_nops;
/* Support targetm.vectorize.builtin_mask_for_load. */
static GTY(()) tree altivec_builtin_mask_for_load;
-/* Support targetm.vectorize.builtin_mask_for_store. */
-static GTY(()) tree altivec_builtin_mask_for_store;
/* Size of long double */
const char *rs6000_long_double_size_string;
@@ -693,7 +691,6 @@ static int pad_groups (FILE *, int, rtx, rtx);
static void rs6000_sched_finish (FILE *, int);
static int rs6000_use_sched_lookahead (void);
static tree rs6000_builtin_mask_for_load (void);
-static tree rs6000_builtin_mask_for_store (void);
static void rs6000_init_builtins (void);
static rtx rs6000_expand_unop_builtin (enum insn_code, tree, rtx);
@@ -933,9 +930,6 @@ static const char alt_reg_names[][8] =
#undef TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD
#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD rs6000_builtin_mask_for_load
-#undef TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE
-#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE rs6000_builtin_mask_for_store
-
#undef TARGET_INIT_BUILTINS
#define TARGET_INIT_BUILTINS rs6000_init_builtins
@@ -1592,16 +1586,6 @@ rs6000_builtin_mask_for_load (void)
return 0;
}
-/* Implement targetm.vectorize.builtin_mask_for_store. */
-static tree
-rs6000_builtin_mask_for_store (void)
-{
- if (TARGET_ALTIVEC)
- return altivec_builtin_mask_for_store;
- else
- return 0;
-}
-
/* Handle generic options of the form -mfoo=yes/no.
NAME is the option name.
VALUE is the option value.
@@ -8308,17 +8292,6 @@ altivec_init_builtins (void)
BUILT_IN_MD, NULL, NULL_TREE);
/* Record the decl. Will be used by rs6000_builtin_mask_for_load. */
altivec_builtin_mask_for_load = decl;
-
-
- /* Initialize target builtin that implements
- targetm.vectorize.builtin_mask_for_store. */
-
- decl = lang_hooks.builtin_function ("__builtin_altivec_mask_for_store",
- v16qi_ftype_long_pcvoid,
- ALTIVEC_BUILTIN_MASK_FOR_STORE,
- BUILT_IN_MD, NULL, NULL_TREE);
- /* Record the decl. Will be used by rs6000_builtin_mask_for_store. */
- altivec_builtin_mask_for_store = decl;
}
}
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 23d386e..f021d15 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -5184,6 +5184,45 @@ holding the constant. This restriction is often true of addresses
of TLS symbols for various targets.
@end deftypefn
+@deftypefn {Target Hook} bool TARGET_VECTORIZE_MISALIGNED_MEM_OK (@var{mode})
+This hook should return true if a move* pattern to/from memory
+can be generated for machine_mode @var{mode} even if the memory location
+is unaligned.
+If a move* of data to/from unaligned memory locations is not supported for
+machine_mode @var{mode}, the hook should return false.
+This hook is used by the autovectorizer, and when expanding a
+@code{MISALIGNED_INDIRECT_REF} expression.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void)
+This hook should return the DECL of a function @var{f} that given an
+address @var{addr} as an argument returns a mask @var{m} that can be
+used to extract from two vectors the relevant data that resides in
+@var{addr} in case @var{addr} is not properly aligned.
+
+The autovectrizer, when vectorizing a load operation from an address
+@var{addr} that may be unaligned, will generate two vector loads from
+the two aligned addresses around @var{addr}. It then generates a
+@code{REALIGN_LOAD} operation to extract the relevant data from the
+two loaded vectors. The first two arguments to @code{REALIGN_LOAD},
+@var{v1} and @var{v2}, are the two vectors, each of size @var{VS}, and
+the third argument, @var{OFF}, defines how the data will be extracted
+from these two vectors: if @var{OFF} is 0, then the returned vector is
+@var{v2}; otherwise, the returned vector is composed from the last
+@var{VS}-@var{OFF} elements of @var{v1} concatenated to the first
+@var{OFF} elements of @var{v2}.
+
+If this hook is defined, the autovectorizer will generate a call
+to @var{f} (using the DECL tree that this hook returns) and will
+use the return value of @var{f} as the argument @var{OFF} to
+@code{REALIGN_LOAD}. Therefore, the mask @var{m} returned by @var{f}
+should comply with the semantics expected by @code{REALIGN_LOAD}
+described above.
+If this hook is not defined, then @var{addr} will be used as
+the argument @var{OFF} to @code{REALIGN_LOAD}, in which case the low
+log2(@var{VS})-1 bits of @var{addr} will be considered.
+@end deftypefn
+
@node Condition Code
@section Condition Code Status
@cindex condition code status
diff --git a/gcc/genopinit.c b/gcc/genopinit.c
index 8c6c8fe..494a482 100644
--- a/gcc/genopinit.c
+++ b/gcc/genopinit.c
@@ -170,7 +170,6 @@ static const char * const optabs[] =
"vec_set_optab->handlers[$A].insn_code = CODE_FOR_$(vec_set$a$)",
"vec_extract_optab->handlers[$A].insn_code = CODE_FOR_$(vec_extract$a$)",
"vec_init_optab->handlers[$A].insn_code = CODE_FOR_$(vec_init$a$)",
- "vec_realign_store_optab->handlers[$A].insn_code = CODE_FOR_$(vec_realign_store_$a$)",
"vec_realign_load_optab->handlers[$A].insn_code = CODE_FOR_$(vec_realign_load_$a$)",
"vcond_gen_code[$A] = CODE_FOR_$(vcond$a$)",
"vcondu_gen_code[$A] = CODE_FOR_$(vcondu$a$)" };
diff --git a/gcc/optabs.c b/gcc/optabs.c
index abf8e29..7c5c6aa 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -294,9 +294,6 @@ optab_for_tree_code (enum tree_code code, tree type)
case MIN_EXPR:
return TYPE_UNSIGNED (type) ? umin_optab : smin_optab;
- case REALIGN_STORE_EXPR:
- return vec_realign_store_optab;
-
case REALIGN_LOAD_EXPR:
return vec_realign_load_optab;
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 76ec8de..241abfd 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -228,8 +228,6 @@ enum optab_index
OTI_vec_extract,
/* Initialize vector operand. */
OTI_vec_init,
- /* Extract specified elements from vectors, for vector store. */
- OTI_vec_realign_store,
/* Extract specified elements from vectors, for vector load. */
OTI_vec_realign_load,
@@ -334,7 +332,6 @@ extern GTY(()) optab optab_table[OTI_MAX];
#define vec_set_optab (optab_table[OTI_vec_set])
#define vec_extract_optab (optab_table[OTI_vec_extract])
#define vec_init_optab (optab_table[OTI_vec_init])
-#define vec_realign_store_optab (optab_table[OTI_vec_realign_store])
#define vec_realign_load_optab (optab_table[OTI_vec_realign_load])
/* Conversion optabs have their own table and indexes. */
diff --git a/gcc/target-def.h b/gcc/target-def.h
index 344f74c..ac00556 100644
--- a/gcc/target-def.h
+++ b/gcc/target-def.h
@@ -277,12 +277,10 @@ Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#define TARGET_VECTORIZE_MISALIGNED_MEM_OK default_vect_misaligned_mem_ok
#endif
#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD 0
-#define TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE 0
#define TARGET_VECTORIZE \
{TARGET_VECTORIZE_MISALIGNED_MEM_OK, \
- TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD, \
- TARGET_VECTORIZE_BUILTIN_MASK_FOR_STORE}
+ TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD}
/* In except.c */
#define TARGET_EH_RETURN_FILTER_MODE default_eh_return_filter_mode
diff --git a/gcc/target.h b/gcc/target.h
index 4927d2b..aa3542c 100644
--- a/gcc/target.h
+++ b/gcc/target.h
@@ -286,17 +286,16 @@ struct gcc_target
struct vectorize
{
/* The following member value is a pointer to a function called
- by the vectorizer, and when expanding a MISALIGNED_INDIREC_REF
+ by te vectorizer, and when expanding a MISALIGNED_INDIRECT_REF
expression. If the hook returns true (false) then a move* pattern
to/from memory can (cannot) be generated for this mode even if the
memory location is unaligned. */
bool (* misaligned_mem_ok) (enum machine_mode);
- /* The following member values are pointers to functions called
+ /* The following member value is a pointer to a function called
by the vectorizer, and return the decl of the target builtin
function. */
tree (* builtin_mask_for_load) (void);
- tree (* builtin_mask_for_store) (void);
} vectorize;
/* Return machine mode for filter value. */
diff --git a/gcc/tree.def b/gcc/tree.def
index b09f066..ccb75c2 100644
--- a/gcc/tree.def
+++ b/gcc/tree.def
@@ -886,17 +886,6 @@ DEFTREECODE (WITH_SIZE_EXPR, "with_size_expr", tcc_expression, 2)
generated by the builtin targetm.vectorize.mask_for_load_builtin_decl. */
DEFTREECODE (REALIGN_LOAD_EXPR, "realign_load", tcc_expression, 3)
-/* Extract elements from two input vectors Operand 0 and Operand 1
- size VS, according to the offset OFF defined by Operand 2 as
- follows:
- If OFF > 0, the last OFF elements of vector OP0 are concatenated to
- the first VS - OFF elements of the vector OP1.
- If OFF == 0, then the returned vector is OP0.
- On different targets OFF may take different forms; It can be an address, in
- which case its low log2(VS)-1 bits define the offset, or it can be a mask
- generated by the builtin targetm.vectorize.mask_for_store_builtin_decl. */
-DEFTREECODE (REALIGN_STORE_EXPR, "realign_store", tcc_expression, 3)
-
/*
Local variables:
mode:c