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authorPan Li <pan2.li@intel.com>2024-06-13 22:35:21 +0800
committerPan Li <pan2.li@intel.com>2024-06-14 22:07:04 +0800
commitd0f6a1ea5363662e01c5b735fe4b19cac4c1caf2 (patch)
treee94341b8f3e6b0e87518c60e5ad3aa6fb0f4d106 /gcc
parent308f87030ea0a4580c16906b948eb8996cf4f8de (diff)
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RISC-V: Add testcases for scalar unsigned SAT_SUB form 4
After the middle-end support the form 4 of unsigned SAT_SUB and the RISC-V backend implement the scalar .SAT_SUB, add more test case to cover the form 4 of unsigned .SAT_SUB. Form 4: #define SAT_SUB_U_4(T) \ T sat_sub_u_4_##T (T x, T y) \ { \ return x >= y ? x - y : 0; \ } Passed the rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add helper macro for test. * gcc.target/riscv/sat_u_sub-13.c: New test. * gcc.target/riscv/sat_u_sub-14.c: New test. * gcc.target/riscv/sat_u_sub-15.c: New test. * gcc.target/riscv/sat_u_sub-16.c: New test. * gcc.target/riscv/sat_u_sub-run-13.c: New test. * gcc.target/riscv/sat_u_sub-run-14.c: New test. * gcc.target/riscv/sat_u_sub-run-15.c: New test. * gcc.target/riscv/sat_u_sub-run-16.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_arith.h8
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-13.c18
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-14.c19
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-15.c18
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-16.c17
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-13.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-14.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-15.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-16.c25
9 files changed, 180 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index 50c65cde..b2f8478 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -99,9 +99,17 @@ sat_u_sub_##T##_fmt_3 (T x, T y) \
return x > y ? x - y : 0; \
}
+#define DEF_SAT_U_SUB_FMT_4(T) \
+T __attribute__((noinline)) \
+sat_u_sub_##T##_fmt_4 (T x, T y) \
+{ \
+ return x >= y ? x - y : 0; \
+}
+
#define RUN_SAT_U_SUB_FMT_1(T, x, y) sat_u_sub_##T##_fmt_1(x, y)
#define RUN_SAT_U_SUB_FMT_2(T, x, y) sat_u_sub_##T##_fmt_2(x, y)
#define RUN_SAT_U_SUB_FMT_3(T, x, y) sat_u_sub_##T##_fmt_3(x, y)
+#define RUN_SAT_U_SUB_FMT_4(T, x, y) sat_u_sub_##T##_fmt_4(x, y)
#define DEF_VEC_SAT_U_SUB_FMT_1(T) \
void __attribute__((noinline)) \
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-13.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-13.c
new file mode 100644
index 0000000..edb7017
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-13.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint8_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*a0,\s*[atx][0-9]+
+** andi\s+a0,\s*a0,\s*0xff
+** ret
+*/
+DEF_SAT_U_SUB_FMT_4(uint8_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-14.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-14.c
new file mode 100644
index 0000000..2aab9f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-14.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint16_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slli\s+a0,\s*a0,\s*48
+** srli\s+a0,\s*a0,\s*48
+** ret
+*/
+DEF_SAT_U_SUB_FMT_4(uint16_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-15.c
new file mode 100644
index 0000000..25ad702
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-15.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint32_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_U_SUB_FMT_4(uint32_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-16.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-16.c
new file mode 100644
index 0000000..72c1931
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-16.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint64_t_fmt_4:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+a0,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_U_SUB_FMT_4(uint64_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-13.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-13.c
new file mode 100644
index 0000000..c8ae7a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-13.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint8_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_4
+
+DEF_SAT_U_SUB_FMT_4(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 255, 254, 1, },
+ { 255, 255, 0, },
+ { 254, 255, 0, },
+ { 253, 254, 0, },
+ { 0, 255, 0, },
+ { 1, 255, 0, },
+ { 32, 5, 27, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-14.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-14.c
new file mode 100644
index 0000000..9b57861
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-14.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint16_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_4
+
+DEF_SAT_U_SUB_FMT_4(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 65535, 65534, 1, },
+ { 65535, 65535, 0, },
+ { 65534, 65535, 0, },
+ { 65533, 65534, 0, },
+ { 0, 65535, 0, },
+ { 1, 65535, 0, },
+ { 35, 5, 30, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-15.c
new file mode 100644
index 0000000..df2eece
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-15.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint32_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_4
+
+DEF_SAT_U_SUB_FMT_4(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 4294967295, 4294967294, 1, },
+ { 4294967295, 4294967295, 0, },
+ { 4294967294, 4294967295, 0, },
+ { 4294967293, 4294967294, 0, },
+ { 1, 4294967295, 0, },
+ { 2, 4294967295, 0, },
+ { 5, 1, 4, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-16.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-16.c
new file mode 100644
index 0000000..09e9ac3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-16.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint64_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_4
+
+DEF_SAT_U_SUB_FMT_4(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 18446744073709551615u, 18446744073709551614u, 1, },
+ { 18446744073709551615u, 18446744073709551615u, 0, },
+ { 18446744073709551614u, 18446744073709551615u, 0, },
+ { 18446744073709551613u, 18446744073709551614u, 0, },
+ { 0, 18446744073709551615u, 0, },
+ { 1, 18446744073709551615u, 0, },
+ { 43, 11, 32, },
+};
+
+#include "scalar_sat_binary.h"