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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-29 09:59:25 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-29 15:53:51 +0000 |
| commit | cf75f86ed980308621ab0db0dc8adc9c72e39f5e (patch) | |
| tree | 4b4a18ed6476d09c59bf92df758493637f6935f7 /gcc | |
| parent | 74eb3570e6fba73b0e2bfce2a14d7696e30b48a8 (diff) | |
| download | gcc-cf75f86ed980308621ab0db0dc8adc9c72e39f5e.zip gcc-cf75f86ed980308621ab0db0dc8adc9c72e39f5e.tar.gz gcc-cf75f86ed980308621ab0db0dc8adc9c72e39f5e.tar.bz2 | |
arm, mve: Fix scan-assembler for test7 in dlstp-compile-asm-2.c
After the changes to the vctp intrinsic codegen changed slightly, where we now
unfortunately seem to be generating unneeded moves and extends of the mask.
These are however not incorrect and we don't have a fix for the unneeded
codegen right now, so changing the testcase to accept them so we can catch
other changes if they occur.
gcc/testsuite/ChangeLog:
PR target/117814
* gcc.target/arm/mve/dlstp-compile-asm-2.c (test7): Add an optional
vmsr to the check-function-bodies.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c index c62f592..2109304 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c @@ -216,7 +216,12 @@ void test7 (int32_t *a, int32_t *b, int32_t *c, int n, int g) **... ** dlstp.32 lr, r3 ** vldrw.32 q[0-9]+, \[r0\], #16 +** ( +** vmsr p0, .* ** vpst +** | +** vpst +** ) ** vldrwt.32 q[0-9]+, \[r1\], #16 ** vadd.i32 (q[0-9]+), q[0-9]+, q[0-9]+ ** vstrw.32 \1, \[r2\], #16 |