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author | Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> | 2011-07-29 18:19:29 +0000 |
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committer | Rainer Orth <ro@gcc.gnu.org> | 2011-07-29 18:19:29 +0000 |
commit | cc822cc1f3f06814ccfa21d9d3ebe5405a6975c7 (patch) | |
tree | 67f398530eb3bd9aedabefce738b4a513d5ddbab /gcc | |
parent | 2514265077f4260ae10377791317c6754b3292df (diff) | |
download | gcc-cc822cc1f3f06814ccfa21d9d3ebe5405a6975c7.zip gcc-cc822cc1f3f06814ccfa21d9d3ebe5405a6975c7.tar.gz gcc-cc822cc1f3f06814ccfa21d9d3ebe5405a6975c7.tar.bz2 |
driver-native.c [__sgi__]: Include <invent.h>, <sys/sbd.h>.
* config/mips/driver-native.c [__sgi__]: Include <invent.h>,
<sys/sbd.h>.
(cpu_types): New array.
(cputype): New function.
(host_detect_local_cpu): Only define buf, f if !__sgi__.
Use scaninvent instead of /proc/cpuinfo if __sgi__.
* config.host: Also use driver-native.o, mips/x-native on
mips-sgi-irix*.
* config/mips/iris6.h [__mips__] (host_detect_local_cpu):
Declare.
(EXTRA_SPEC_FUNCTIONS, MARCH_MTUNE_NATIVE_SPECS): Define.
(DRIVER_SELF_SPECS): Add MARCH_MTUNE_NATIVE_SPECS.
From-SVN: r176947
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 15 | ||||
-rw-r--r-- | gcc/config.host | 4 | ||||
-rw-r--r-- | gcc/config/mips/driver-native.c | 61 | ||||
-rw-r--r-- | gcc/config/mips/iris6.h | 17 |
4 files changed, 93 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index de98034..6c707bb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2011-07-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/mips/driver-native.c [__sgi__]: Include <invent.h>, + <sys/sbd.h>. + (cpu_types): New array. + (cputype): New function. + (host_detect_local_cpu): Only define buf, f if !__sgi__. + Use scaninvent instead of /proc/cpuinfo if __sgi__. + * config.host: Also use driver-native.o, mips/x-native on + mips-sgi-irix*. + * config/mips/iris6.h [__mips__] (host_detect_local_cpu): + Declare. + (EXTRA_SPEC_FUNCTIONS, MARCH_MTUNE_NATIVE_SPECS): Define. + (DRIVER_SELF_SPECS): Add MARCH_MTUNE_NATIVE_SPECS. + 2011-07-29 Jakub Jelinek <jakub@redhat.com> PR middle-end/49897 diff --git a/gcc/config.host b/gcc/config.host index 771be8c..85009d1 100644 --- a/gcc/config.host +++ b/gcc/config.host @@ -118,9 +118,9 @@ case ${host} in ;; esac ;; - mips*-*-linux*) + mips*-*-linux* | mips-sgi-irix*) case ${target} in - mips*-*-linux*) + mips*-*-linux* | mips-sgi-irix*) host_extra_gcc_objs="driver-native.o" host_xmake_file="${host_xmake_file} mips/x-native" ;; diff --git a/gcc/config/mips/driver-native.c b/gcc/config/mips/driver-native.c index 1947d71..ec5adf4 100644 --- a/gcc/config/mips/driver-native.c +++ b/gcc/config/mips/driver-native.c @@ -1,5 +1,5 @@ /* Subroutines for the gcc driver. - Copyright (C) 2008 Free Software Foundation, Inc. + Copyright (C) 2008, 2011 Free Software Foundation, Inc. This file is part of GCC. @@ -22,6 +22,59 @@ along with GCC; see the file COPYING3. If not see #include "coretypes.h" #include "tm.h" +#ifdef __sgi__ +#include <invent.h> +#include <sys/sbd.h> + +/* Cf. MIPS R10000 Microprocessor User Guide, Version 2.0, 14.13 Processor + Revision Identifier (PRId) Register (15). + + http://techpubs.sgi.com/library/tpl/cgi-bin/getdoc.cgi/hdwr/bks/SGI_Developer/books/R10K_UM/sgi_html/t5.Ver.2.0.book_279.html */ + +static const struct cpu_types { + int impl; + const char *cpu; +} cpu_types[] = { + { C0_IMP_R2000, "r2000" }, + { C0_IMP_R3000, "r3000" }, + { C0_IMP_R6000, "r6000" }, + { C0_IMP_R4000, "r4000" }, + { C0_IMP_R6000A, "r6000" }, + { C0_IMP_R10000, "r10000" }, + { C0_IMP_R12000, "r12000" }, + { C0_IMP_R14000, "r14000" }, + { C0_IMP_R8000, "r8000" }, + { C0_IMP_R4600, "r4600" }, + { C0_IMP_R4700, "r4600" }, + { C0_IMP_R4650, "r4650" }, + { C0_IMP_R5000, "vr5000" }, + { C0_IMP_RM7000, "rm7000" }, + { C0_IMP_RM5271, "vr5000" }, + { 0, 0 } +}; + +static int +cputype (inventory_t *inv, void *arg) +{ + if (inv != NULL + && inv->inv_class == INV_PROCESSOR + && inv->inv_type == INV_CPUCHIP) + { + int i; + /* inv_state is the cpu revision number. */ + int impl = (inv->inv_state & C0_IMPMASK) >> C0_IMPSHIFT; + + for (i = 0; cpu_types[i].cpu != NULL; i++) + if (cpu_types[i].impl == impl) + { + *((const char **) arg) = cpu_types[i].cpu; + break; + } + } + return 0; +} +#endif + /* This will be called by the spec parser in gcc.c when it sees a %:local_cpu_detect(args) construct. Currently it will be called with either "arch" or "tune" as argument depending on if -march=native @@ -39,8 +92,10 @@ const char * host_detect_local_cpu (int argc, const char **argv) { const char *cpu = NULL; +#ifndef __sgi__ char buf[128]; FILE *f; +#endif bool arch; if (argc < 1) @@ -50,6 +105,9 @@ host_detect_local_cpu (int argc, const char **argv) if (!arch && strcmp (argv[0], "tune")) return NULL; +#ifdef __sgi__ + scaninvent (cputype, &cpu); +#else f = fopen ("/proc/cpuinfo", "r"); if (f == NULL) return NULL; @@ -73,6 +131,7 @@ host_detect_local_cpu (int argc, const char **argv) } fclose (f); +#endif if (cpu == NULL) return NULL; diff --git a/gcc/config/mips/iris6.h b/gcc/config/mips/iris6.h index 6515dbf..7ab1f78 100644 --- a/gcc/config/mips/iris6.h +++ b/gcc/config/mips/iris6.h @@ -27,13 +27,28 @@ along with GCC; see the file COPYING3. If not see #undef MULTILIB_DEFAULTS #define MULTILIB_DEFAULTS { "mabi=n32" } +/* -march=native handling only makes sense with compiler running on + a MIPS chip. */ +#if defined(__mips__) +extern const char *host_detect_local_cpu (int argc, const char **argv); +# define EXTRA_SPEC_FUNCTIONS \ + { "local_cpu_detect", host_detect_local_cpu }, + +# define MARCH_MTUNE_NATIVE_SPECS \ + " %{march=native:%<march=native %:local_cpu_detect(arch)}" \ + " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" +#else +# define MARCH_MTUNE_NATIVE_SPECS "" +#endif + /* Force the default ABI onto the command line in order to make the specs easier to write. */ #undef DRIVER_SELF_SPECS #define DRIVER_SELF_SPECS \ "%{!mabi=*: -mabi=n32}", \ /* Configuration-independent MIPS rules. */ \ - BASE_DRIVER_SELF_SPECS + BASE_DRIVER_SELF_SPECS, \ + MARCH_MTUNE_NATIVE_SPECS /* IRIX 6.5 has the float and long double forms of math functions. */ #define TARGET_C99_FUNCTIONS 1 |