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| author | Richard Earnshaw <rearnsha@arm.com> | 2012-08-20 10:57:45 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2012-08-20 10:57:45 +0000 |
| commit | c3b3cd8d6899e345dc9792b57c2b1b78b3f3635e (patch) | |
| tree | 9aa1b75ab16300342b60ebc65ea916b8db8c7223 /gcc | |
| parent | 71f15f319bb8e6366ebd93023f5a5154a4722f5c (diff) | |
| download | gcc-c3b3cd8d6899e345dc9792b57c2b1b78b3f3635e.zip gcc-c3b3cd8d6899e345dc9792b57c2b1b78b3f3635e.tar.gz gcc-c3b3cd8d6899e345dc9792b57c2b1b78b3f3635e.tar.bz2 | |
thumb-16bit-ops.c (f): This test uses a 16-bit add instruction.
* gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit
add instruction.
(f2): New test that really does need adds.
From-SVN: r190530
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c | 11 |
2 files changed, 15 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ba0b5b2..e9aaf24 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2012-08-20 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit + add instruction. + (f2): New test that really does need adds. + 2012-08-20 Richard Guenther <rguenther@suse.de> PR tree-optimization/54327 diff --git a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c index bd4f489..90407eb 100644 --- a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c +++ b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c @@ -4,14 +4,21 @@ /* { dg-options "-Os -fno-builtin -mthumb" } */ int -f (int a, int b ) +f (int a, int b) { return a + b; } -/* { dg-final { scan-assembler "adds r0, r0, r1" } } */ +/* { dg-final { scan-assembler "add r0, r0, r1" } } */ int +f2 (int a, int b, int c) +{ + return b + c; +} + +/* { dg-final { scan-assembler "adds r0, r1, r2" } } */ +int g1 (int a) { return a + 255; |