diff options
author | Roger Sayle <roger@nextmovesoftware.com> | 2021-11-30 08:35:39 +0000 |
---|---|---|
committer | Roger Sayle <roger@nextmovesoftware.com> | 2021-11-30 08:35:39 +0000 |
commit | c39d77f252e895306ef88c1efb3eff04e4232554 (patch) | |
tree | 90de97dc9fdbc692cb7dbdf8e06eac36b77d9021 /gcc | |
parent | b962469a01b017ae2e7ef2865a40e37094ceec4b (diff) | |
download | gcc-c39d77f252e895306ef88c1efb3eff04e4232554.zip gcc-c39d77f252e895306ef88c1efb3eff04e4232554.tar.gz gcc-c39d77f252e895306ef88c1efb3eff04e4232554.tar.bz2 |
x86_64: PR target/100711: Splitters for pandn
This patch addresses PR target/100711 by introducing define_split
patterns so that not/broadcast/pand may be simplified (by combine)
to broadcast/pandn. This introduces two splitters one for optimizing
pandn on TARGET_SSE for V4SI and V2DI, and another for vpandn on
TARGET_AVX2 for V16QI, V8HI, V32QI, V16HI and V8SI. Each splitter
has its own new testcase.
I've also confirmed that not/broadcast/pandn is already getting
simplified to broadcast/pand by the middle-end optimizers.
2021-11-30 Roger Sayle <roger@nextmovesoftware.com>
Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog
PR target/100711
* config/i386/sse.md (define_split): New splitters to simplify
not;vec_duplicate;and as vec_duplicate;andn.
gcc/testsuite/ChangeLog
PR target/100711
* gcc.target/i386/pr100711-1.c: New test case.
* gcc.target/i386/pr100711-2.c: New test case.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/i386/sse.md | 32 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr100711-1.c | 17 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr100711-2.c | 47 |
3 files changed, 96 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b6d03b8..08bdcdd 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -16323,6 +16323,38 @@ ] (const_string "<sseinsnmode>")))]) +;; PR target/100711: Split notl; vpbroadcastd; vpand as vpbroadcastd; vpandn +(define_split + [(set (match_operand:VI48_128 0 "register_operand") + (and:VI48_128 + (vec_duplicate:VI48_128 + (not:<ssescalarmode> + (match_operand:<ssescalarmode> 1 "register_operand"))) + (match_operand:VI48_128 2 "vector_operand")))] + "TARGET_SSE" + [(set (match_dup 3) + (vec_duplicate:VI48_128 (match_dup 1))) + (set (match_dup 0) + (and:VI48_128 (not:VI48_128 (match_dup 3)) + (match_dup 2)))] + "operands[3] = gen_reg_rtx (<MODE>mode);") + +;; PR target/100711: Split notl; vpbroadcastd; vpand as vpbroadcastd; vpandn +(define_split + [(set (match_operand:VI124_AVX2 0 "register_operand") + (and:VI124_AVX2 + (vec_duplicate:VI124_AVX2 + (not:<ssescalarmode> + (match_operand:<ssescalarmode> 1 "register_operand"))) + (match_operand:VI124_AVX2 2 "vector_operand")))] + "TARGET_AVX2" + [(set (match_dup 3) + (vec_duplicate:VI124_AVX2 (match_dup 1))) + (set (match_dup 0) + (and:VI124_AVX2 (not:VI124_AVX2 (match_dup 3)) + (match_dup 2)))] + "operands[3] = gen_reg_rtx (<MODE>mode);") + (define_insn "*andnot<mode>3_mask" [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v") (vec_merge:VI48_AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/pr100711-1.c b/gcc/testsuite/gcc.target/i386/pr100711-1.c new file mode 100644 index 0000000..c6928f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr100711-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2" } */ + +typedef int v4si __attribute__((vector_size (16))); +typedef long long v2di __attribute__((vector_size (16))); + +v4si foo (int a, v4si b) +{ + return (__extension__ (v4si) {~a, ~a, ~a, ~a}) & b; +} + +v2di bar (long long a, v2di b) +{ + return (__extension__ (v2di) {~a, ~a}) & b; +} + +/* { dg-final { scan-assembler-times "pandn" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr100711-2.c b/gcc/testsuite/gcc.target/i386/pr100711-2.c new file mode 100644 index 0000000..ccaf168 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr100711-2.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx2" } */ + +typedef char v16qi __attribute__ ((vector_size (16))); +typedef short v8hi __attribute__ ((vector_size (16))); +typedef int v4si __attribute__ ((vector_size (16))); + +typedef char v32qi __attribute__ ((vector_size (32))); +typedef short v16hi __attribute__ ((vector_size (32))); +typedef int v8si __attribute__ ((vector_size (32))); + +v16qi foo_v16qi (char a, v16qi b) +{ + return (__extension__ (v16qi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a, + ~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b; +} + +v8hi foo_v8hi (short a, v8hi b) +{ + return (__extension__ (v8hi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,}) & b; +} + +v4si foo_v4si (int a, v4si b) +{ + return (__extension__ (v4si) {~a, ~a, ~a, ~a}) & b; +} + +v32qi foo_v32qi (char a, v32qi b) +{ + return (__extension__ (v32qi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a, + ~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a, + ~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a, + ~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b; +} + +v16hi foo_v16hi (short a, v16hi b) +{ + return (__extension__ (v16hi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a, + ~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b; +} + +v8si foo_v8si (int a, v8si b) +{ + return (__extension__ (v8si) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,}) & b; +} + +/* { dg-final { scan-assembler-times "vpandn" 6 } } */ |