diff options
| author | Steve Chamberlain <sac@gnu.org> | 1994-09-09 23:43:17 +0000 |
|---|---|---|
| committer | Steve Chamberlain <sac@gnu.org> | 1994-09-09 23:43:17 +0000 |
| commit | c3898ccd985d6b16504c0d3da21f21769fb1fce5 (patch) | |
| tree | 17b4f4f54e143f5281da9becfa078b9f332fc8fe /gcc | |
| parent | a1dba937e509b9c0ed2872354df9af4e9675285e (diff) | |
| download | gcc-c3898ccd985d6b16504c0d3da21f21769fb1fce5.zip gcc-c3898ccd985d6b16504c0d3da21f21769fb1fce5.tar.gz gcc-c3898ccd985d6b16504c0d3da21f21769fb1fce5.tar.bz2 | |
*** empty log message ***
From-SVN: r8064
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/sh/sh.c | 13 | ||||
| -rw-r--r-- | gcc/config/sh/sh.md | 4 | ||||
| -rw-r--r-- | gcc/config/sh/t-sh | 34 |
3 files changed, 44 insertions, 7 deletions
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 7aa323f..dcb845d 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -693,7 +693,7 @@ prepare_move_operands (operands, mode) /* copy the source to a register */ operands[1] = copy_to_mode_reg (mode, operands[1]); } - if ((mode == DImode || mode == SImode || mode == HImode || mode == QImode) + if ((mode == SImode || mode == HImode || mode == QImode) && GET_CODE (operands[1]) == CONST_INT) { return synth_constant (operands, mode); @@ -2512,3 +2512,14 @@ sh_function_arg_partial_nregs (CUM, MODE, TYPE, NAMED) } return 0; } + +/* Turn this on to recognise shift insns which aren't supported in the + hardware. This will allow the combiner to notice more patterns, + but the down side is that the asm outputter will have to emit + several instructions for each shift which isn't possible in the + hardware, this makes scheduling perform badly .*/ + +int fake_shift() +{ + return 0; +} diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 4c46a9c..3ad663b 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -634,7 +634,7 @@ (ashift:SI (match_operand:SI 1 "arith_reg_operand" "0") (match_operand:SI 2 "immediate_operand" "n"))) (clobber (reg:SI 18))] - "" + "fake_shift()" "*return output_shift(\"shll\", operands[0], operands[2], ASHIFT);" [(set_attr "length" "12") (set_attr "in_delay_slot" "no") @@ -727,7 +727,7 @@ (lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0") (match_operand:SI 2 "immediate_operand" "n"))) (clobber (reg:SI 18))] - "" + "fake_shift()" "* return output_shift (\"shlr\", operands[0], operands[2], LSHIFTRT);" [(set_attr "length" "12") (set_attr "in_delay_slot" "no") diff --git a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh index 0067223..30f7c60 100644 --- a/gcc/config/sh/t-sh +++ b/gcc/config/sh/t-sh @@ -1,6 +1,32 @@ -LIBGCC1 = libgcc1.null -CROSS_LIBGCC1 = libgcc1.null -T_CFLAGS = -DDONT_HAVE_STDIO -DDONT_HAVE_SETJMP -Dinhibit_libc -LIBGCC2_CFLAGS=-g -O5 $(GCC_CFLAGS) +CROSS_LIBGCC1 = libgcc1-asm.a +LIB1ASMSRC = sh/lib1funcs.asm +LIB1ASMFUNCS = _ashiftrt _movstr _mulsi3 _sdivsi3 _udivsi3 + +LIBGCC2_CFLAGS=-g -O5 $(GCC_CFLAGS) + +# CYGNUS LOCAL sh +LANGUAGES=c c++ proto + +# CYGNUS LOCAL sh +# These are really part of libgcc1, but this will cause them to be +# built correctly, so... [taken from t-ose68k] + +LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c ashlsi3.c ashrsi3.c lshrsi3.c + +ashlsi3.c: $(srcdir)/config/sh/ashlsi3.c + cp $(srcdir)/config/sh/ashlsi3.c ashlsi3.c + +ashrsi3.c: $(srcdir)/config/sh/ashrsi3.c + cp $(srcdir)/config/sh/ashrsi3.c ashrsi3.c + +lshrsi3.c: $(srcdir)/config/sh/lshrsi3.c + cp $(srcdir)/config/sh/lshrsi3.c lshrsi3.c + +dp-bit.c: $(srcdir)/config/fp-bit.c + cat $(srcdir)/config/fp-bit.c > dp-bit.c + +fp-bit.c: $(srcdir)/config/fp-bit.c + echo '#define FLOAT' > fp-bit.c + cat $(srcdir)/config/fp-bit.c >> fp-bit.c |