Do not use separate 386 patterns for SF/DF/XF/DI pushes; allow SF/DF/XF/DI pushes to push from memory if no scratch register available; allow use of leal on 486; allow XF<-XF memory moves on 386

From-SVN: r8088

1 files changed, 68 insertions, 75 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 998027e..330002b 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1070,11 +1070,9 @@
       && GET_CODE (operands[0]) == MEM
       && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode)))
     {
-      rtx (*genfunc) PROTO((rtx, rtx));
-      if (push_operand (operands[0], SFmode))
-	genfunc = (TARGET_386) ? gen_movsf_push386 : gen_movsf_push486;
-      else
-	genfunc = gen_movsf_mem;
+      rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], SFmode))
+						? gen_movsf_push
+						: gen_movsf_mem;
 
       emit_insn ((*genfunc) (operands[0], operands[1]));
       DONE;
@@ -1084,7 +1082,7 @@
 (define_insn "movsf_push386"
   [(set (match_operand:SF 0 "push_operand" "=<,<")
 	(match_operand:SF 1 "general_operand" "gF,f"))]
-  "TARGET_386 || !TARGET_MOVE"
+  "!TARGET_MOVE"
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1109,11 +1107,11 @@
   return AS1 (push%L1,%1);
 }")
 
-(define_insn "movsf_push486"
+(define_insn "movsf_push"
   [(set (match_operand:SF 0 "push_operand" "=<,<,<")
 	(match_operand:SF 1 "general_operand" "rF,f,m"))
    (clobber (match_scratch:SI 2 "=X,X,r"))]
-  "!TARGET_386"
+  ""
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1241,21 +1239,19 @@
       && GET_CODE (operands[0]) == MEM
       && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode)))
     {
-      rtx (*genfunc) PROTO((rtx, rtx));
-      if (push_operand (operands[0], DFmode))
-	genfunc = (TARGET_386) ? gen_movdf_push386 : gen_movdf_push486;
-      else
-	genfunc = gen_movdf_mem;
+      rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], DFmode))
+						? gen_movdf_push
+						: gen_movdf_mem;
 
       emit_insn ((*genfunc) (operands[0], operands[1]));
       DONE;
     }
 }")
 
-(define_insn "movdf_push386"
+(define_insn "movdf_push_nomove"
   [(set (match_operand:DF 0 "push_operand" "=<,<")
 	(match_operand:DF 1 "general_operand" "gF,f"))]
-  "TARGET_386 || !TARGET_MOVE"
+  "!TARGET_MOVE"
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1279,12 +1275,12 @@
     return output_move_double (operands);
 }")
 
-(define_insn "movdf_push486"
-  [(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
-	(match_operand:DF 1 "general_operand" "rF,f,o,o"))
-   (clobber (match_scratch:SI 2 "=X,X,&r,&r"))
-   (clobber (match_scratch:SI 3 "=X,X,&r,X"))]
-  "!TARGET_386"
+(define_insn "movdf_push"
+  [(set (match_operand:DF 0 "push_operand" "=<,<,<,<,<")
+	(match_operand:DF 1 "general_operand" "rF,f,o,o,o"))
+   (clobber (match_scratch:SI 2 "=X,X,&r,&r,X"))
+   (clobber (match_scratch:SI 3 "=X,X,&r,X,X"))]
+  ""
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1305,7 +1301,8 @@
       RET;
     }
 
-  else if (GET_CODE (operands[1]) != MEM)
+  else if (GET_CODE (operands[1]) != MEM
+	   || GET_CODE (operands[2]) != REG)
     return output_move_double (operands);
 
   else
@@ -1459,21 +1456,20 @@
       && GET_CODE (operands[0]) == MEM
       && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode)))
     {
-      rtx (*genfunc) PROTO((rtx, rtx));
-      if (push_operand (operands[0], XFmode))
-	genfunc = (TARGET_386) ? gen_movxf_push386 : gen_movxf_push486;
-      else
-	genfunc = gen_movxf_mem;
+      rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], XFmode))
+						? gen_movxf_push
+						: gen_movxf_mem;
 
       emit_insn ((*genfunc) (operands[0], operands[1]));
       DONE;
     }
 }")
 
-(define_insn "movxf_push386"
+
+(define_insn "movxf_push_nomove"
   [(set (match_operand:XF 0 "push_operand" "=<,<")
  	(match_operand:XF 1 "general_operand" "gF,f"))]
-  "TARGET_386 || !TARGET_MOVE"
+  "!TARGET_MOVE"
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1495,12 +1491,12 @@
     return output_move_double (operands);
  }")
 
-(define_insn "movxf_push486"
-  [(set (match_operand:XF 0 "push_operand" "=<,<,<,<")
- 	(match_operand:XF 1 "general_operand" "rF,f,o,o"))
-   (clobber (match_scratch:SI 2 "=X,X,&r,&r"))
-   (clobber (match_scratch:SI 3 "=X,X,&r,X"))]
-  "!TARGET_386"
+(define_insn "movxf_push"
+  [(set (match_operand:XF 0 "push_operand" "=<,<,<,<,<")
+ 	(match_operand:XF 1 "general_operand" "rF,f,o,o,o"))
+   (clobber (match_scratch:SI 2 "=X,X,&r,&r,X"))
+   (clobber (match_scratch:SI 3 "=X,X,&r,X,X"))]
+  ""
   "*
 {
   if (STACK_REG_P (operands[1]))
@@ -1519,7 +1515,8 @@
       RET;
     }
 
-  else if (GET_CODE (operands[1]) != MEM)
+  else if (GET_CODE (operands[1]) != MEM
+	   || GET_CODE (operands[2]) != REG)
     return output_move_double (operands);
 
   else
@@ -1575,7 +1572,7 @@
 	(match_operand:XF 1 "memory_operand" "o,o"))
    (clobber (match_scratch:SI 2 "=&r,&r"))
    (clobber (match_scratch:SI 3 "=&r,X"))]
-  "!TARGET_386"
+  ""
   "*
 {
   rtx xop[8];
@@ -1693,32 +1690,31 @@
       && GET_CODE (operands[0]) == MEM
       && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DImode)))
     {
-      rtx (*genfunc) PROTO((rtx, rtx));
-      if (push_operand (operands[0], DImode))
-	genfunc = (TARGET_386) ? gen_movdi_push386 : gen_movdi_push486;
-      else
-	genfunc = gen_movdi_mem;
+      rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], DImode))
+						? gen_movdi_push
+						: gen_movdi_mem;
 
       emit_insn ((*genfunc) (operands[0], operands[1]));
       DONE;
     }
 }")
 
-(define_insn "movdi_push386"
+(define_insn "movdi_push_nomove"
   [(set (match_operand:DI 0 "push_operand" "=<")
 	(match_operand:DI 1 "general_operand" "roiF"))]
-  "TARGET_386 || !TARGET_MOVE"
+  "!TARGET_MOVE"
   "* return output_move_double (operands);")
 
-(define_insn "movdi_push486"
-  [(set (match_operand:DI 0 "push_operand" "=<,<,<")
-	(match_operand:DI 1 "general_operand" "riF,o,o"))
-   (clobber (match_scratch:SI 2 "=X,&r,=&r"))
-   (clobber (match_scratch:SI 3 "=X,&r,X"))]
-  "!TARGET_386"
+(define_insn "movdi_push"
+  [(set (match_operand:DI 0 "push_operand" "=<,<,<,<")
+	(match_operand:DI 1 "general_operand" "riF,o,o,o"))
+   (clobber (match_scratch:SI 2 "=X,&r,&r,X"))
+   (clobber (match_scratch:SI 3 "=X,&r,X,X"))]
+  ""
   "*
 {
-  if (GET_CODE (operands[1]) != MEM)
+  if (GET_CODE (operands[1]) != MEM
+      || GET_CODE (operands[2]) != REG)
     return output_move_double (operands);
 
   else
@@ -1810,7 +1806,7 @@
   ""
   "*
 {
-  if ((TARGET_486 || REGNO (operands[0]) == 0)
+  if ((!TARGET_386 || REGNO (operands[0]) == 0)
       && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
     {
       rtx xops[2];
@@ -1834,7 +1830,7 @@
   ""
   "*
 {
-  if ((TARGET_486 || REGNO (operands[0]) == 0)
+  if ((!TARGET_386 || REGNO (operands[0]) == 0)
       && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
     {
       rtx xops[2];
@@ -1858,7 +1854,7 @@
   ""
   "*
 {
-  if ((TARGET_486 || REGNO (operands[0]) == 0)
+  if ((!TARGET_386 || REGNO (operands[0]) == 0)
       && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
     {
       rtx xops[2];
@@ -2599,23 +2595,20 @@
       if (REG_P (operands[2]) && REGNO (operands[0]) == REGNO (operands[2]))
 	return AS2 (add%L0,%1,%0);
 
-      if (! TARGET_486 || ! REG_P (operands[2]))
-        {
-	  CC_STATUS_INIT;
+      if (operands[2] == stack_pointer_rtx)
+	{
+	  rtx temp;
 
-	  if (operands[2] == stack_pointer_rtx)
-	    {
-	      rtx temp;
+	  temp = operands[1];
+	  operands[1] = operands[2];
+	  operands[2] = temp;
+	}
 
-	      temp = operands[1];
-	      operands[1] = operands[2];
-	      operands[2] = temp;
-	    }
-	  if (operands[2] != stack_pointer_rtx)
-	    {
-	      operands[1] = SET_SRC (PATTERN (insn));
-	      return AS2 (lea%L0,%a1,%0);
-	    }
+      if (operands[2] != stack_pointer_rtx)
+	{
+	  CC_STATUS_INIT;
+	  operands[1] = SET_SRC (PATTERN (insn));
+	  return AS2 (lea%L0,%a1,%0);
 	}
 
       output_asm_insn (AS2 (mov%L0,%1,%0), operands);
@@ -3094,7 +3087,7 @@
       if (INTVAL (operands[2]) == 0xffff && REG_P (operands[0])
 	  && (! REG_P (operands[1])
 	      || REGNO (operands[0]) != 0 || REGNO (operands[1]) != 0)
-	  && (! TARGET_486 || ! rtx_equal_p (operands[0], operands[1])))
+	  && (TARGET_386 || ! rtx_equal_p (operands[0], operands[1])))
 	{
 	  /* ??? tege: Should forget CC_STATUS only if we clobber a
 	     remembered operand.  Fix that later.  */
@@ -3110,7 +3103,7 @@
 	  && !(REG_P (operands[1]) && NON_QI_REG_P (operands[1]))
 	  && (! REG_P (operands[1])
 	      || REGNO (operands[0]) != 0 || REGNO (operands[1]) != 0)
-	  && (! TARGET_486 || ! rtx_equal_p (operands[0], operands[1])))
+	  && (TARGET_386 || ! rtx_equal_p (operands[0], operands[1])))
 	{
 	  /* ??? tege: Should forget CC_STATUS only if we clobber a
 	     remembered operand.  Fix that later.  */
@@ -3753,7 +3746,7 @@
 {
   if (REG_P (operands[0]) && REGNO (operands[0]) != REGNO (operands[1]))
     {
-      if (TARGET_486 && INTVAL (operands[2]) == 1)
+      if (!TARGET_386 && INTVAL (operands[2]) == 1)
 	{
 	  output_asm_insn (AS2 (mov%L0,%1,%0), operands);
 	  return AS2 (add%L0,%1,%0);
@@ -4254,7 +4247,7 @@
 			 (const_int 1)
 			 (match_operand:SI 2 "general_operand" "r"))
 	(match_operand:SI 3 "const_int_operand" "n"))]
-  "! TARGET_486 && GET_CODE (operands[2]) != CONST_INT"
+  "TARGET_386 && GET_CODE (operands[2]) != CONST_INT"
   "*
 {
   CC_STATUS_INIT;
@@ -4272,7 +4265,7 @@
 	(xor:SI (ashift:SI (const_int 1)
 			   (match_operand:SI 1 "general_operand" "r"))
 		(match_operand:SI 2 "general_operand" "0")))]
-  "! TARGET_486 && GET_CODE (operands[1]) != CONST_INT"
+  "TARGET_386 && GET_CODE (operands[1]) != CONST_INT"
   "*
 {
   CC_STATUS_INIT;
@@ -4285,7 +4278,7 @@
 	(xor:SI (match_operand:SI 1 "general_operand" "0")
 		(ashift:SI (const_int 1)
 			   (match_operand:SI 2 "general_operand" "r"))))]
-  "! TARGET_486 && GET_CODE (operands[2]) != CONST_INT"
+  "TARGET_386 && GET_CODE (operands[2]) != CONST_INT"
   "*
 {
   CC_STATUS_INIT;