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authorJuzhe-Zhong <juzhe.zhong@rivai.ai>2023-11-14 11:21:16 +0800
committerPan Li <pan2.li@intel.com>2023-11-14 11:22:16 +0800
commitbfcb6e518371bb943b77e0ef784e1de72a99aec6 (patch)
tree9fb428237489d7c1ce1e70dd95fc4ca88d4203cf /gcc
parentfd1596f9962569afff6c9298a7c79686c6950bef (diff)
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RISC-V: Fix init-2.c assembly check
Notice the assembly check of init-2.c is wrong. Committed. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/init-2.c: Fix vid.v check.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
index f27c395..ae31e22 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c
@@ -45,4 +45,4 @@ DEF_INIT (v128uhi, uint16_t, 128, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,
127)
-/* { dg-final { scan-assembler-times {vid\.vx} 494 } } */
+/* { dg-final { scan-assembler-times {vid\.v} 14 } } */