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authorPan Li <pan2.li@intel.com>2025-03-03 14:51:21 +0800
committerPan Li <pan2.li@intel.com>2025-03-04 09:38:59 +0800
commitbfb9276f344cbc6794379d61d0279dfc3a7441b3 (patch)
treec6baaa4f175093eae6e1ed951192e3346456a72a /gcc
parent491c0b8071323295471648a438eb4c216d15735c (diff)
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RISC-V: Fix the test case bug-3.c failure
The bug-3.c would like to check the slli a[0-9]+, a[0-9]+, 33 for the big poly int handling. But the underlying insn may change to slli 1 + slli 32 with sorts of optimization. Thus, update the asm check to function body check with above slli 1 + slli 32 series. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/bug-3.c: Update asm check to function body check. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
index 05ac2e5..2d5f4c2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/bug-3.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d -mrvv-max-lmul=m8 -mrvv-vector-bits=scalable -fno-vect-cost-model -O2 -ffast-math" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#define N 16
@@ -25,7 +26,15 @@ _Complex float res[N] =
-740.0F + 2488.0iF, -760.0F + 2638.0iF,
-780.0F + 2792.0iF, -800.0F + 2950.0iF };
-
+/*
+** foo:
+** ...
+** csrr\s+[atx][0-9]+,\s*vlenb
+** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*1
+** ...
+** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
+** ...
+*/
void
foo (void)
{
@@ -36,4 +45,3 @@ foo (void)
}
/* { dg-final { scan-assembler-not {li\s+[a-x0-9]+,\s*0} } } */
-/* { dg-final { scan-assembler-times {slli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*33} 1 } } */