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authorJuzhe-Zhong <juzhe.zhong@rivai.ai>2023-11-07 21:30:14 +0800
committerPan Li <pan2.li@intel.com>2023-11-07 21:31:24 +0800
commitbeb1e2bf1bd4b7c8fc8d3dd450667344ae8e0aca (patch)
treea092f01d5450cbc8771498e095415c0cd6a92d49 /gcc
parent7562f089a190953b8ef615b90b7b0520e812a930 (diff)
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test: Fix FAIL of pr65518.c for RVV[PR112420]
PR target/112420 gcc/testsuite/ChangeLog: * gcc.dg/vect/pr65518.c: Fix check for RVV.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.dg/vect/pr65518.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.dg/vect/pr65518.c b/gcc/testsuite/gcc.dg/vect/pr65518.c
index 3e5b986..189a655 100644
--- a/gcc/testsuite/gcc.dg/vect/pr65518.c
+++ b/gcc/testsuite/gcc.dg/vect/pr65518.c
@@ -49,4 +49,6 @@ int main ()
sub-optimal and causes memory explosion (even though the cost model
should reject that in the end). */
-/* { dg-final { scan-tree-dump-times "vectorized 0 loops in function" 2 "vect" } } */
+/* { dg-final { scan-tree-dump-times "vectorized 0 loops in function" 2 "vect" { target {! riscv*-*-* } } } } */
+/* We end up using gathers for the strided load on RISC-V which would be OK. */
+/* { dg-final { scan-tree-dump "using gather/scatter for strided/grouped access" "vect" { target { riscv*-*-* } } } } */