diff options
| author | David S. Miller <davem@pierdol.cobaltmicro.com> | 1998-08-29 22:46:34 +0000 |
|---|---|---|
| committer | David S. Miller <davem@gcc.gnu.org> | 1998-08-29 15:46:34 -0700 |
| commit | be3f1ff52c819ad4f1d08adcd8e116e61159594d (patch) | |
| tree | 0585ba04c79c2eec00898d2fd1089d518e677784 /gcc | |
| parent | 25135471c2dc449204f61be4a4bab997ccb85285 (diff) | |
| download | gcc-be3f1ff52c819ad4f1d08adcd8e116e61159594d.zip gcc-be3f1ff52c819ad4f1d08adcd8e116e61159594d.tar.gz gcc-be3f1ff52c819ad4f1d08adcd8e116e61159594d.tar.bz2 | |
sparc.md (pic_lo_sum_di, [...]): Rename to movdi_lo_sum_pic and movdi_high_pic and make visible.
* config/sparc/sparc.md (pic_lo_sum_di, pic_sethi_di): Rename to
movdi_lo_sum_pic and movdi_high_pic and make visible.
* config/sparc/sparc.c (legitimize_pic_address): For -fPIC,
emit these when Pmode is not SImode.
* config/sparc/linux64.h (SPARC_DEFAULT_CMODEL): Make CM_MEDLOW.
From-SVN: r22094
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/sparc/linux64.h | 2 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.c | 12 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.md | 4 |
4 files changed, 21 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cab3e2..1e17e2b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +Sat Aug 29 21:38:24 1998 David S. Miller <davem@pierdol.cobaltmicro.com> + + * config/sparc/sparc.md (pic_lo_sum_di, pic_sethi_di): Rename to + movdi_lo_sum_pic and movdi_high_pic and make visible. + * config/sparc/sparc.c (legitimize_pic_address): For -fPIC, + emit these when Pmode is not SImode. + * config/sparc/linux64.h (SPARC_DEFAULT_CMODEL): Make CM_MEDLOW. + Sat Aug 29 14:59:32 1998 Mumit Khan <khan@xraylith.wisc.edu> * i386/cygwin32.h (ASM_OUTPUT_SECTION_NAME): Don't emit diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h index 866d357..9c2df81 100644 --- a/gcc/config/sparc/linux64.h +++ b/gcc/config/sparc/linux64.h @@ -82,7 +82,7 @@ Boston, MA 02111-1307, USA. */ /* The default code model. */ #undef SPARC_DEFAULT_CMODEL -#define SPARC_DEFAULT_CMODEL CM_MEDANY +#define SPARC_DEFAULT_CMODEL CM_MEDLOW #undef WCHAR_TYPE #define WCHAR_TYPE "long int" diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 11c17f5..0e8b804 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -2449,8 +2449,16 @@ legitimize_pic_address (orig, mode, reg) won't get confused into thinking that these two instructions are loading in the true address of the symbol. If in the future a PIC rtx exists, that should be used instead. */ - emit_insn (gen_movsi_high_pic (temp_reg, orig)); - emit_insn (gen_movsi_lo_sum_pic (temp_reg, temp_reg, orig)); + if (Pmode == SImode) + { + emit_insn (gen_movsi_high_pic (temp_reg, orig)); + emit_insn (gen_movsi_lo_sum_pic (temp_reg, temp_reg, orig)); + } + else + { + emit_insn (gen_movdi_high_pic (temp_reg, orig)); + emit_insn (gen_movdi_lo_sum_pic (temp_reg, temp_reg, orig)); + } address = temp_reg; } else diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 6290a55..f1ac5ce 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -2405,7 +2405,7 @@ ;; Sparc-v9 code model support insns. See sparc_emit_set_symbolic_const64 ;; in sparc.c to see what is going on here... PIC stuff comes first. -(define_insn "*pic_lo_sum_di" +(define_insn "movdi_lo_sum_pic" [(set (match_operand:DI 0 "register_operand" "=r") (lo_sum:DI (match_operand:DI 1 "register_operand" "r") (unspec:DI [(match_operand:DI 2 "immediate_operand" "in")] 0)))] @@ -2414,7 +2414,7 @@ [(set_attr "type" "ialu") (set_attr "length" "1")]) -(define_insn "*pic_sethi_di" +(define_insn "movdi_high_pic" [(set (match_operand:DI 0 "register_operand" "=r") (high:DI (unspec:DI [(match_operand 1 "" "")] 0)))] "TARGET_ARCH64 && flag_pic && check_pic (1)" |