aarch64: Rename FLAG_AUTO_FP to FLAG_QUIET

I'd suggested the name "FLAG_AUTO_FP" to mean "automatically derive
FLAG_FP from the mode", i.e. automatically decide whether the function
might read the FPCR or might raise FP exceptions.  However, the flag
currently suppresses that behaviour instead.

This patch renames FLAG_AUTO_FP to FLAG_QUIET.  That's probably not a
great name, but it's also what the SVE code means by "quiet", and is
borrowed from "quiet NaNs".

gcc/
	* config/aarch64/aarch64-builtins.cc (FLAG_AUTO_FP): Rename to...
	(FLAG_QUIET): ...this and update all references.
	* config/aarch64/aarch64-simd-builtins.def: Update all references
	here too.

2 files changed, 23 insertions, 23 deletions

diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index 22f8216..4f735e8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -202,13 +202,13 @@ const unsigned int FLAG_WRITE_MEMORY = 1U << 4;
 
 /* Not all FP intrinsics raise FP exceptions or read FPCR register,
    use this flag to suppress it.  */
-const unsigned int FLAG_AUTO_FP = 1U << 5;
+const unsigned int FLAG_QUIET = 1U << 5;
 
 const unsigned int FLAG_FP = FLAG_READ_FPCR | FLAG_RAISE_FP_EXCEPTIONS;
 const unsigned int FLAG_ALL = FLAG_READ_FPCR | FLAG_RAISE_FP_EXCEPTIONS
   | FLAG_READ_MEMORY | FLAG_PREFETCH_MEMORY | FLAG_WRITE_MEMORY;
-const unsigned int FLAG_STORE = FLAG_WRITE_MEMORY | FLAG_AUTO_FP;
-const unsigned int FLAG_LOAD = FLAG_READ_MEMORY | FLAG_AUTO_FP;
+const unsigned int FLAG_STORE = FLAG_WRITE_MEMORY | FLAG_QUIET;
+const unsigned int FLAG_LOAD = FLAG_READ_MEMORY | FLAG_QUIET;
 
 typedef struct
 {
@@ -1322,7 +1322,7 @@ aarch64_init_simd_builtin_scalar_types (void)
 static unsigned int
 aarch64_call_properties (unsigned int flags, machine_mode mode)
 {
-  if (!(flags & FLAG_AUTO_FP) && FLOAT_MODE_P (mode))
+  if (!(flags & FLAG_QUIET) && FLOAT_MODE_P (mode))
     flags |= FLAG_FP;
 
   /* -fno-trapping-math means that we can assume any FP exceptions
@@ -4061,7 +4061,7 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt,
 	gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
 	break;
 
-     BUILTIN_VDC (BINOP, combine, 0, AUTO_FP)
+     BUILTIN_VDC (BINOP, combine, 0, QUIET)
      BUILTIN_VD_I (BINOPU, combine, 0, NONE)
      BUILTIN_VDC_P (BINOPP, combine, 0, NONE)
 	{
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 0814f8b..3df2773 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -50,7 +50,7 @@
   BUILTIN_V12DI (STORESTRUCT_LANE_U, vec_stl1_lane, 0, ALL)
   BUILTIN_V12DI (STORESTRUCT_LANE_P, vec_stl1_lane, 0, ALL)
 
-  BUILTIN_VDC (BINOP, combine, 0, AUTO_FP)
+  BUILTIN_VDC (BINOP, combine, 0, QUIET)
   BUILTIN_VD_I (BINOPU, combine, 0, NONE)
   BUILTIN_VDC_P (BINOPP, combine, 0, NONE)
   BUILTIN_VB (BINOPP, pmul, 0, NONE)
@@ -657,12 +657,12 @@
 
   /* Implemented by
      aarch64_<PERMUTE:perm_insn><mode>.  */
-  BUILTIN_VALL (BINOP, zip1, 0, AUTO_FP)
-  BUILTIN_VALL (BINOP, zip2, 0, AUTO_FP)
-  BUILTIN_VALL (BINOP, uzp1, 0, AUTO_FP)
-  BUILTIN_VALL (BINOP, uzp2, 0, AUTO_FP)
-  BUILTIN_VALL (BINOP, trn1, 0, AUTO_FP)
-  BUILTIN_VALL (BINOP, trn2, 0, AUTO_FP)
+  BUILTIN_VALL (BINOP, zip1, 0, QUIET)
+  BUILTIN_VALL (BINOP, zip2, 0, QUIET)
+  BUILTIN_VALL (BINOP, uzp1, 0, QUIET)
+  BUILTIN_VALL (BINOP, uzp2, 0, QUIET)
+  BUILTIN_VALL (BINOP, trn1, 0, QUIET)
+  BUILTIN_VALL (BINOP, trn2, 0, QUIET)
 
   BUILTIN_GPF_F16 (UNOP, frecpe, 0, FP)
   BUILTIN_GPF_F16 (UNOP, frecpx, 0, FP)
@@ -674,9 +674,9 @@
 
   /* Implemented by a mixture of abs2 patterns.  Note the DImode builtin is
      only ever used for the int64x1_t intrinsic, there is no scalar version.  */
-  BUILTIN_VSDQ_I_DI (UNOP, abs, 0, AUTO_FP)
-  BUILTIN_VHSDF (UNOP, abs, 2, AUTO_FP)
-  VAR1 (UNOP, abs, 2, AUTO_FP, hf)
+  BUILTIN_VSDQ_I_DI (UNOP, abs, 0, QUIET)
+  BUILTIN_VHSDF (UNOP, abs, 2, QUIET)
+  VAR1 (UNOP, abs, 2, QUIET, hf)
 
   BUILTIN_VQ_HSF (UNOP, vec_unpacks_hi_, 10, FP)
   VAR1 (BINOP, float_truncate_hi_, 0, FP, v4sf)
@@ -720,7 +720,7 @@
   BUILTIN_VDQQH (BSL_P, simd_bsl, 0, NONE)
   VAR2 (BSL_P, simd_bsl,0, NONE, di, v2di)
   BUILTIN_VSDQ_I_DI (BSL_U, simd_bsl, 0, NONE)
-  BUILTIN_VALLDIF (BSL_S, simd_bsl, 0, AUTO_FP)
+  BUILTIN_VALLDIF (BSL_S, simd_bsl, 0, QUIET)
 
   /* Implemented by aarch64_crypto_aes<op><mode>.  */
   VAR1 (BINOPU, crypto_aese, 0, NONE, v16qi)
@@ -940,12 +940,12 @@
   BUILTIN_VSFDF (UNOP, frint64x, 0, FP)
 
   /* Implemented by aarch64_bfdot{_lane}{q}<mode>.  */
-  VAR2 (TERNOP, bfdot, 0, AUTO_FP, v2sf, v4sf)
-  VAR2 (QUADOP_LANE_PAIR, bfdot_lane, 0, AUTO_FP, v2sf, v4sf)
-  VAR2 (QUADOP_LANE_PAIR, bfdot_laneq, 0, AUTO_FP, v2sf, v4sf)
+  VAR2 (TERNOP, bfdot, 0, QUIET, v2sf, v4sf)
+  VAR2 (QUADOP_LANE_PAIR, bfdot_lane, 0, QUIET, v2sf, v4sf)
+  VAR2 (QUADOP_LANE_PAIR, bfdot_laneq, 0, QUIET, v2sf, v4sf)
 
   /* Implemented by aarch64_bfmmlaqv4sf  */
-  VAR1 (TERNOP, bfmmlaq, 0, AUTO_FP, v4sf)
+  VAR1 (TERNOP, bfmmlaq, 0, QUIET, v4sf)
 
   /* Implemented by aarch64_bfmlal<bt>{_lane{q}}v4sf  */
   VAR1 (TERNOP, bfmlalb, 0, FP, v4sf)
@@ -967,6 +967,6 @@
   VAR1 (UNOP, bfcvt, 0, FP, bf)
 
   /* Implemented by aarch64_{v}bfcvt{_high}<mode>.  */
-  VAR2 (UNOP, vbfcvt, 0, AUTO_FP, v4bf, v8bf)
-  VAR1 (UNOP, vbfcvt_high, 0, AUTO_FP, v8bf)
-  VAR1 (UNOP, bfcvt, 0, AUTO_FP, sf)
+  VAR2 (UNOP, vbfcvt, 0, QUIET, v4bf, v8bf)
+  VAR1 (UNOP, vbfcvt_high, 0, QUIET, v8bf)
+  VAR1 (UNOP, bfcvt, 0, QUIET, sf)