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authorUros Bizjak <ubizjak@gmail.com>2019-08-28 17:09:51 +0200
committerUros Bizjak <uros@gcc.gnu.org>2019-08-28 17:09:51 +0200
commitbc4aa158c9490e76573bee3eec90f893b7d0b1ae (patch)
tree1308da8c7ca02d946447fc48db72110d23753979 /gcc
parentb66113e9c1ec1f7550cf9680b9b9e4d725583f34 (diff)
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* config/i386/i386-features.c
(general_scalar_chain::compute_convert_gain): Correct cost for double-word shifts. (general_scalar_to_vector_candidate_p): Reject count operands greater or equal to mode bitsize. From-SVN: r274994
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/i386/i386.c6
2 files changed, 11 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 525cd90..561bbcb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-08-28 Uroš Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386-features.c
+ (general_scalar_chain::compute_convert_gain):
+ Correct cost for double-word shifts.
+ (general_scalar_to_vector_candidate_p): Reject count operands
+ greater or equal to mode bitsize.
+
2019-08-28 Martin Jambor <mjambor@suse.cz>
PR ipa/91468
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f3b3a9a..d2d84eb 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -18617,9 +18617,9 @@ ix86_register_move_cost (machine_mode mode, reg_class_t class1_i,
where integer modes in SSE registers are not tieable
because of missing QImode and HImode moves to, from or between
MMX/SSE registers. */
- return MAX (8, SSE_CLASS_P (class1)
- ? ix86_cost->hard_register.sse_to_integer
- : ix86_cost->hard_register.integer_to_sse);
+ return (SSE_CLASS_P (class1)
+ ? ix86_cost->hard_register.sse_to_integer
+ : ix86_cost->hard_register.integer_to_sse);
if (MAYBE_FLOAT_CLASS_P (class1))
return ix86_cost->hard_register.fp_move;