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author | liuhongt <hongtao.liu@intel.com> | 2024-07-24 11:29:23 +0800 |
---|---|---|
committer | liuhongt <hongtao.liu@intel.com> | 2024-07-30 10:51:47 +0800 |
commit | bc1fda00d5f20e2f3e77a50b2822562b6e0040b2 (patch) | |
tree | d2589ec5a682e055c3dfbe98309a016bcc744114 /gcc | |
parent | b4524c4430ba9771265bd9fc31e69a3f35dfe117 (diff) | |
download | gcc-bc1fda00d5f20e2f3e77a50b2822562b6e0040b2.zip gcc-bc1fda00d5f20e2f3e77a50b2822562b6e0040b2.tar.gz gcc-bc1fda00d5f20e2f3e77a50b2822562b6e0040b2.tar.bz2 |
Refine constraint "Bk" to define_special_memory_constraint.
For below pattern, RA may still allocate r162 as v/k register, try to
reload for address with leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rsi
which result a linker error.
(set (reg:DI 162)
(mem/u/c:DI
(const:DI (unspec:DI
[(symbol_ref:DI ("a") [flags 0x60] <var_decl 0x7f621f6e1c60 a>)]
UNSPEC_GOTNTPOFF))
Quote from H.J for why linker issue an error.
>What do these do:
>
> leaq __libc_tsd_CTYPE_B@gottpoff(%rip), %rax
> vmovq (%rax), %xmm0
>
>From x86-64 TLS psABI:
>
>The assembler generates for the x@gottpoff(%rip) expressions a R X86
>64 GOTTPOFF relocation for the symbol x which requests the linker to
>generate a GOT entry with a R X86 64 TPOFF64 relocation. The offset of
>the GOT entry relative to the end of the instruction is then used in
>the instruction. The R X86 64 TPOFF64 relocation is pro- cessed at
>program startup time by the dynamic linker by looking up the symbol x
>in the modules loaded at that point. The offset is written in the GOT
>entry and later loaded by the addq instruction.
>
>The above code sequence looks wrong to me.
gcc/ChangeLog:
PR target/116043
* config/i386/constraints.md (Bk): Refine to
define_special_memory_constraint.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr116043.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/i386/constraints.md | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr116043.c | 33 |
2 files changed, 34 insertions, 1 deletions
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 7508d7a..b760e7c 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -187,7 +187,7 @@ "@internal Vector memory operand." (match_operand 0 "vector_memory_operand")) -(define_memory_constraint "Bk" +(define_special_memory_constraint "Bk" "@internal TLS address that allows insn using non-integer registers." (and (match_operand 0 "memory_operand") (not (match_test "ix86_gpr_tls_address_pattern_p (op)")))) diff --git a/gcc/testsuite/gcc.target/i386/pr116043.c b/gcc/testsuite/gcc.target/i386/pr116043.c new file mode 100644 index 0000000..7655349 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr116043.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bf16 -O3" } */ +/* { dg-final { scan-assembler-not {(?n)lea.*@gottpoff} } } */ + +extern __thread int a, c, i, j, k, l; +int *b; +struct d { + int e; +} f, g; +char *h; + +void m(struct d *n) { + b = &k; + for (; n->e; b++, n--) { + i = b && a; + if (i) + j = c; + } +} + +char *o(struct d *n) { + for (; n->e;) + return h; +} + +int q() { + if (l) + return 1; + int p = *o(&g); + m(&f); + m(&g); + l = p; +} |