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| author | liuhongt <hongtao.liu@intel.com> | 2024-11-21 23:57:38 -0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2024-11-24 18:14:51 -0800 |
| commit | ba4cf2e296d8d5950c3d356fa6b6efcad00d0189 (patch) | |
| tree | 253210350dcaa85f014e28fa4167769ebcca19bb /gcc | |
| parent | 97717af3867e1cc3092470d7189066b9df4b3f4f (diff) | |
| download | gcc-ba4cf2e296d8d5950c3d356fa6b6efcad00d0189.zip gcc-ba4cf2e296d8d5950c3d356fa6b6efcad00d0189.tar.gz gcc-ba4cf2e296d8d5950c3d356fa6b6efcad00d0189.tar.bz2 | |
Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.
It could cause weired spill in RA when register pressure is high.
gcc/ChangeLog:
PR target/117562
* config/i386/sse.md (vec_unpacks_hi_v4sf): Initialize
operands[2] with CONST0_RTX.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/sse.md | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 72acd5b..498a42d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -10424,7 +10424,10 @@ (match_dup 2) (parallel [(const_int 0) (const_int 1)]))))] "TARGET_SSE2" - "operands[2] = gen_reg_rtx (V4SFmode);") +{ + operands[2] = gen_reg_rtx (V4SFmode); + emit_move_insn (operands[2], CONST0_RTX (V4SFmode)); +}) (define_expand "vec_unpacks_hi_v8sf" [(set (match_dup 2) |