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authorDJ Delorie <dj@redhat.com>2009-07-06 22:33:47 -0400
committerDJ Delorie <dj@gcc.gnu.org>2009-07-06 22:33:47 -0400
commitb932c20b25c7516eb5fa2a813b8bfa786569c0b4 (patch)
tree1271fbdc282bae2945b2eb68580e1489971c5fff /gcc
parentfab922b1f55fe7766a375d0ee28a1c48f3185250 (diff)
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mep-core.cpu (fsft, ssarb): Mark as VOLATILE.
* config/mep/mep-core.cpu (fsft, ssarb): Mark as VOLATILE. * config/mep/mep-ivc2.cpu (many): Add VOLATILE to more insns that make unspecified accesses to control registers. * config/mep/intrinsics.md: Regenerate. * config/mep/intrinsics.h: Regenerate. * config/mep/mep-intrin.h: Regenerate. From-SVN: r149311
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/mep/intrinsics.h94
-rw-r--r--gcc/config/mep/intrinsics.md331
-rw-r--r--gcc/config/mep/mep-core.cpu4
-rw-r--r--gcc/config/mep/mep-intrin.h8
-rw-r--r--gcc/config/mep/mep-ivc2.cpu150
6 files changed, 290 insertions, 306 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9acef1e..6e8a3c8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2009-07-06 DJ Delorie <dj@redhat.com>
+
+ * config/mep/mep-core.cpu (fsft, ssarb): Mark as VOLATILE.
+ * config/mep/mep-ivc2.cpu (many): Add VOLATILE to more insns that make
+ unspecified accesses to control registers.
+ * config/mep/intrinsics.md: Regenerate.
+ * config/mep/intrinsics.h: Regenerate.
+ * config/mep/mep-intrin.h: Regenerate.
+
2009-07-07 Manuel López-Ibáñez <manu@gcc.gnu.org>
* c-lex.c: Replace %H by an explicit location. Update all calls.
diff --git a/gcc/config/mep/intrinsics.h b/gcc/config/mep/intrinsics.h
index 287bc29..b18217a 100644
--- a/gcc/config/mep/intrinsics.h
+++ b/gcc/config/mep/intrinsics.h
@@ -80,21 +80,21 @@ void mep_cpsraa0 (cp_data_bus_int); // volatile
void mep_cpsrla0 (cp_data_bus_int); // volatile
void mep_cpaccpa0 (); // volatile
void mep_cpacsuma0 (); // volatile
-cp_v2si mep_cpmovhla0_w ();
-cp_v2si mep_cpmovhua0_w ();
-cp_v2si mep_cppackla0_w ();
-cp_v2si mep_cppackua0_w ();
-cp_v4hi mep_cppackla0_h ();
-cp_v4hi mep_cppackua0_h ();
-cp_v8qi mep_cppacka0_b ();
-cp_v8uqi mep_cppacka0u_b ();
-cp_v2si mep_cpmovlla0_w ();
-cp_v2si mep_cpmovlua0_w ();
-cp_v2si mep_cpmovula0_w ();
-cp_v2si mep_cpmovuua0_w ();
-cp_v4hi mep_cpmovla0_h ();
-cp_v4hi mep_cpmovua0_h ();
-cp_v8qi mep_cpmova0_b ();
+cp_v2si mep_cpmovhla0_w (); // volatile
+cp_v2si mep_cpmovhua0_w (); // volatile
+cp_v2si mep_cppackla0_w (); // volatile
+cp_v2si mep_cppackua0_w (); // volatile
+cp_v4hi mep_cppackla0_h (); // volatile
+cp_v4hi mep_cppackua0_h (); // volatile
+cp_v8qi mep_cppacka0_b (); // volatile
+cp_v8uqi mep_cppacka0u_b (); // volatile
+cp_v2si mep_cpmovlla0_w (); // volatile
+cp_v2si mep_cpmovlua0_w (); // volatile
+cp_v2si mep_cpmovula0_w (); // volatile
+cp_v2si mep_cpmovuua0_w (); // volatile
+cp_v4hi mep_cpmovla0_h (); // volatile
+cp_v4hi mep_cpmovua0_h (); // volatile
+cp_v8qi mep_cpmova0_b (); // volatile
void mep_cpsetla0_w (cp_v2si, cp_v2si); // volatile
void mep_cpsetua0_w (cp_v2si, cp_v2si); // volatile
void mep_cpseta0_h (cp_v4hi, cp_v4hi); // volatile
@@ -175,21 +175,21 @@ void mep_cpsrlia1 (long); // volatile
void mep_cpslla1 (cp_data_bus_int); // volatile
void mep_cpsraa1 (cp_data_bus_int); // volatile
void mep_cpsrla1 (cp_data_bus_int); // volatile
-cp_v2si mep_cpmovhla1_w ();
-cp_v2si mep_cpmovhua1_w ();
-cp_v2si mep_cppackla1_w ();
-cp_v2si mep_cppackua1_w ();
-cp_v4hi mep_cppackla1_h ();
-cp_v4hi mep_cppackua1_h ();
-cp_v8qi mep_cppacka1_b ();
-cp_v8uqi mep_cppacka1u_b ();
-cp_v2si mep_cpmovlla1_w ();
-cp_v2si mep_cpmovlua1_w ();
-cp_v2si mep_cpmovula1_w ();
-cp_v2si mep_cpmovuua1_w ();
-cp_v4hi mep_cpmovla1_h ();
-cp_v4hi mep_cpmovua1_h ();
-cp_v8qi mep_cpmova1_b ();
+cp_v2si mep_cpmovhla1_w (); // volatile
+cp_v2si mep_cpmovhua1_w (); // volatile
+cp_v2si mep_cppackla1_w (); // volatile
+cp_v2si mep_cppackua1_w (); // volatile
+cp_v4hi mep_cppackla1_h (); // volatile
+cp_v4hi mep_cppackua1_h (); // volatile
+cp_v8qi mep_cppacka1_b (); // volatile
+cp_v8uqi mep_cppacka1u_b (); // volatile
+cp_v2si mep_cpmovlla1_w (); // volatile
+cp_v2si mep_cpmovlua1_w (); // volatile
+cp_v2si mep_cpmovula1_w (); // volatile
+cp_v2si mep_cpmovuua1_w (); // volatile
+cp_v4hi mep_cpmovla1_h (); // volatile
+cp_v4hi mep_cpmovua1_h (); // volatile
+cp_v8qi mep_cpmova1_b (); // volatile
void mep_cpsetla1_w (cp_v2si, cp_v2si); // volatile
void mep_cpsetua1_w (cp_v2si, cp_v2si); // volatile
void mep_cpseta1_h (cp_v4hi, cp_v4hi); // volatile
@@ -228,8 +228,8 @@ cp_data_bus_int mep_cdclipi3 (cp_data_bus_int, long);
cp_data_bus_int mep_cdclipiu3 (cp_data_bus_int, long);
cp_v2si mep_cpclipi3_w (cp_v2si, long);
cp_v2si mep_cpclipiu3_w (cp_v2si, long);
-cp_v2si mep_cpslai3_w (cp_v2si, long);
-cp_v4hi mep_cpslai3_h (cp_v4hi, long);
+cp_v2si mep_cpslai3_w (cp_v2si, long); // volatile
+cp_v4hi mep_cpslai3_h (cp_v4hi, long); // volatile
cp_data_bus_int mep_cdslli3 (cp_data_bus_int, long);
cp_v2si mep_cpslli3_w (cp_v2si, long);
cp_v4hi mep_cpslli3_h (cp_v4hi, long);
@@ -310,7 +310,7 @@ cp_v8uqi mep_cpextuu_b (cp_v8uqi);
cp_v2si mep_cpbcast_w (cp_v2si);
cp_v4hi mep_cpbcast_h (cp_v4hi);
cp_v8qi mep_cpbcast_b (cp_v8qi);
-void mep_cpccadd_b (cp_v8qi*);
+void mep_cpccadd_b (cp_v8qi*); // volatile
cp_v2si mep_cphadd_w (cp_v2si);
cp_v4hi mep_cphadd_h (cp_v4hi);
cp_v8qi mep_cphadd_b (cp_v8qi);
@@ -325,9 +325,9 @@ cp_v8qi mep_cpabsz_b (cp_v8qi);
void mep_cpmovtocc (cp_data_bus_int); // volatile
void mep_cpmovtocsar1 (cp_data_bus_int); // volatile
void mep_cpmovtocsar0 (cp_data_bus_int); // volatile
-cp_data_bus_int mep_cpmovfrcc ();
-cp_data_bus_int mep_cpmovfrcsar1 ();
-cp_data_bus_int mep_cpmovfrcsar0 ();
+cp_data_bus_int mep_cpmovfrcc (); // volatile
+cp_data_bus_int mep_cpmovfrcsar1 (); // volatile
+cp_data_bus_int mep_cpmovfrcsar0 (); // volatile
cp_v2si mep_cpmin3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpminu3_w (cp_v2si, cp_v2si);
cp_v4hi mep_cpmin3_h (cp_v4hi, cp_v4hi);
@@ -357,12 +357,12 @@ cp_v8qi mep_cpextladd3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextladdu3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextuadd3_b (cp_v8qi, cp_v8qi);
cp_v8qi mep_cpextuaddu3_b (cp_v8qi, cp_v8qi);
-cp_v2si mep_cpssub3_w (cp_v2si, cp_v2si);
-cp_v4hi mep_cpssub3_h (cp_v4hi, cp_v4hi);
-cp_v2si mep_cpsadd3_w (cp_v2si, cp_v2si);
-cp_v4hi mep_cpsadd3_h (cp_v4hi, cp_v4hi);
-cp_v2si mep_cpsla3_w (cp_v2si, cp_v2si);
-cp_v4hi mep_cpsla3_h (cp_v4hi, cp_v4hi);
+cp_v2si mep_cpssub3_w (cp_v2si, cp_v2si); // volatile
+cp_v4hi mep_cpssub3_h (cp_v4hi, cp_v4hi); // volatile
+cp_v2si mep_cpsadd3_w (cp_v2si, cp_v2si); // volatile
+cp_v4hi mep_cpsadd3_h (cp_v4hi, cp_v4hi); // volatile
+cp_v2si mep_cpsla3_w (cp_v2si, cp_v2si); // volatile
+cp_v4hi mep_cpsla3_h (cp_v4hi, cp_v4hi); // volatile
cp_data_bus_int mep_cdsll3 (cp_data_bus_int, cp_data_bus_int);
cp_v2si mep_cpssll3_w (cp_v2si, cp_v2si);
cp_v2si mep_cpsll3_w (cp_v2si, cp_v2si);
@@ -393,10 +393,10 @@ cp_v8qi mep_cpunpackl_b (cp_v8qi, cp_v8qi);
cp_v2usi mep_cpunpacku_w (cp_v2usi, cp_v2usi);
cp_v4uhi mep_cpunpacku_h (cp_v4uhi, cp_v4uhi);
cp_v8uqi mep_cpunpacku_b (cp_v8uqi, cp_v8uqi);
-cp_data_bus_int mep_cpfsftbs1 (cp_data_bus_int, cp_data_bus_int);
-cp_data_bus_int mep_cpfsftbs0 (cp_data_bus_int, cp_data_bus_int);
+cp_data_bus_int mep_cpfsftbs1 (cp_data_bus_int, cp_data_bus_int); // volatile
+cp_data_bus_int mep_cpfsftbs0 (cp_data_bus_int, cp_data_bus_int); // volatile
cp_data_bus_int mep_cpfsftbi (cp_data_bus_int, cp_data_bus_int, long);
-cp_data_bus_int mep_cpsel (cp_data_bus_int, cp_data_bus_int);
+cp_data_bus_int mep_cpsel (cp_data_bus_int, cp_data_bus_int); // volatile
cp_vector mep_cpxor3 (cp_vector, cp_vector);
cp_vector mep_cpnor3 (cp_vector, cp_vector);
cp_vector mep_cpor3 (cp_vector, cp_vector);
@@ -518,7 +518,7 @@ void mep_beqi (long, long, void *);
void mep_bnez (long, void *);
void mep_beqz (long, void *);
void mep_bra (void *);
-void mep_fsft (long*, long);
+void mep_fsft (long*, long); // volatile
void mep_sll3 (long*, long, long);
void mep_slli (long*, long);
void mep_srli (long*, long);
@@ -555,7 +555,7 @@ void mep_movu24 (long*, long);
void mep_movi16 (long*, long);
void mep_movi8 (long*, long);
void mep_mov (long*, long);
-void mep_ssarb (long, long);
+void mep_ssarb (long, long); // volatile
void mep_extuh (long*);
void mep_extub (long*);
void mep_exth (long*);
diff --git a/gcc/config/mep/intrinsics.md b/gcc/config/mep/intrinsics.md
index 9c86f5f..76a19c9 100644
--- a/gcc/config/mep/intrinsics.md
+++ b/gcc/config/mep/intrinsics.md
@@ -5977,7 +5977,7 @@
(define_insn "cgen_intrinsic_cpmovhla1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2794))]
"CGEN_ENABLE_INSN_P (139)"
@@ -5992,7 +5992,7 @@
(define_insn "cgen_intrinsic_cpmovhla1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2794))]
"CGEN_ENABLE_INSN_P (140)"
@@ -6007,7 +6007,7 @@
(define_insn "cgen_intrinsic_cpmovhua1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2796))]
"CGEN_ENABLE_INSN_P (141)"
@@ -6022,7 +6022,7 @@
(define_insn "cgen_intrinsic_cpmovhua1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2796))]
"CGEN_ENABLE_INSN_P (142)"
@@ -6037,7 +6037,7 @@
(define_insn "cgen_intrinsic_cppackla1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2798))]
"CGEN_ENABLE_INSN_P (143)"
@@ -6052,7 +6052,7 @@
(define_insn "cgen_intrinsic_cppackla1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2798))]
"CGEN_ENABLE_INSN_P (144)"
@@ -6067,7 +6067,7 @@
(define_insn "cgen_intrinsic_cppackua1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2800))]
"CGEN_ENABLE_INSN_P (145)"
@@ -6082,7 +6082,7 @@
(define_insn "cgen_intrinsic_cppackua1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2800))]
"CGEN_ENABLE_INSN_P (146)"
@@ -6097,7 +6097,7 @@
(define_insn "cgen_intrinsic_cppackla1_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2802))]
"CGEN_ENABLE_INSN_P (147)"
@@ -6112,7 +6112,7 @@
(define_insn "cgen_intrinsic_cppackla1_h_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2802))]
"CGEN_ENABLE_INSN_P (148)"
@@ -6127,7 +6127,7 @@
(define_insn "cgen_intrinsic_cppackua1_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2804))]
"CGEN_ENABLE_INSN_P (149)"
@@ -6142,7 +6142,7 @@
(define_insn "cgen_intrinsic_cppackua1_h_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2804))]
"CGEN_ENABLE_INSN_P (150)"
@@ -6157,7 +6157,7 @@
(define_insn "cgen_intrinsic_cppacka1_b_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2806))]
"CGEN_ENABLE_INSN_P (151)"
@@ -6172,7 +6172,7 @@
(define_insn "cgen_intrinsic_cppacka1_b_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2806))]
"CGEN_ENABLE_INSN_P (152)"
@@ -6187,7 +6187,7 @@
(define_insn "cgen_intrinsic_cppacka1u_b_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2808))]
"CGEN_ENABLE_INSN_P (153)"
@@ -6202,7 +6202,7 @@
(define_insn "cgen_intrinsic_cppacka1u_b_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2808))]
"CGEN_ENABLE_INSN_P (154)"
@@ -6217,7 +6217,7 @@
(define_insn "cgen_intrinsic_cpmovlla1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2810))]
"CGEN_ENABLE_INSN_P (155)"
@@ -6232,7 +6232,7 @@
(define_insn "cgen_intrinsic_cpmovlla1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2810))]
"CGEN_ENABLE_INSN_P (156)"
@@ -6247,7 +6247,7 @@
(define_insn "cgen_intrinsic_cpmovlua1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2812))]
"CGEN_ENABLE_INSN_P (157)"
@@ -6262,7 +6262,7 @@
(define_insn "cgen_intrinsic_cpmovlua1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2812))]
"CGEN_ENABLE_INSN_P (158)"
@@ -6277,7 +6277,7 @@
(define_insn "cgen_intrinsic_cpmovula1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2814))]
"CGEN_ENABLE_INSN_P (159)"
@@ -6292,7 +6292,7 @@
(define_insn "cgen_intrinsic_cpmovula1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2814))]
"CGEN_ENABLE_INSN_P (160)"
@@ -6307,7 +6307,7 @@
(define_insn "cgen_intrinsic_cpmovuua1_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2816))]
"CGEN_ENABLE_INSN_P (161)"
@@ -6322,7 +6322,7 @@
(define_insn "cgen_intrinsic_cpmovuua1_w_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2816))]
"CGEN_ENABLE_INSN_P (162)"
@@ -6337,7 +6337,7 @@
(define_insn "cgen_intrinsic_cpmovla1_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2818))]
"CGEN_ENABLE_INSN_P (163)"
@@ -6352,7 +6352,7 @@
(define_insn "cgen_intrinsic_cpmovla1_h_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2818))]
"CGEN_ENABLE_INSN_P (164)"
@@ -6367,7 +6367,7 @@
(define_insn "cgen_intrinsic_cpmovua1_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2820))]
"CGEN_ENABLE_INSN_P (165)"
@@ -6382,7 +6382,7 @@
(define_insn "cgen_intrinsic_cpmovua1_h_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2820))]
"CGEN_ENABLE_INSN_P (166)"
@@ -6397,7 +6397,7 @@
(define_insn "cgen_intrinsic_cpmova1_b_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2822))]
"CGEN_ENABLE_INSN_P (167)"
@@ -6412,7 +6412,7 @@
(define_insn "cgen_intrinsic_cpmova1_b_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 2822))]
"CGEN_ENABLE_INSN_P (168)"
@@ -9063,7 +9063,7 @@
(define_insn "cgen_intrinsic_cpslai3_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")
] 3190))]
@@ -9079,7 +9079,7 @@
(define_insn "cgen_intrinsic_cpslai3_w_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")
] 3190))]
@@ -9095,7 +9095,7 @@
(define_insn "cgen_intrinsic_cpslai3_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")
] 3192))]
@@ -9111,7 +9111,7 @@
(define_insn "cgen_intrinsic_cpslai3_h_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")
] 3192))]
@@ -9511,7 +9511,7 @@
(define_insn "cgen_intrinsic_cpsla3_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3460))]
@@ -9527,7 +9527,7 @@
(define_insn "cgen_intrinsic_cpsla3_w_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3460))]
@@ -9543,7 +9543,7 @@
(define_insn "cgen_intrinsic_cpsla3_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3462))]
@@ -9559,7 +9559,7 @@
(define_insn "cgen_intrinsic_cpsla3_h_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3462))]
@@ -11399,20 +11399,15 @@
(define_insn "cgen_intrinsic_cpssub3_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3448))
(set (reg:SI 84)
- (unspec:SI [
- (match_dup 1)
- (match_dup 2)
- ] 3450))
- (set (reg:SI 113)
- (unspec:SI [
+ (unspec_volatile:SI [
(match_dup 1)
(match_dup 2)
- ] 3451))]
+ ] 3450))]
"CGEN_ENABLE_INSN_P (390)"
"cpssub3.w\\t%0,%1,%2"
[(set_attr "may_trap" "no")
@@ -11425,20 +11420,15 @@
(define_insn "cgen_intrinsic_cpssub3_w_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3448))
(set (reg:SI 84)
- (unspec:SI [
- (match_dup 1)
- (match_dup 2)
- ] 3450))
- (set (reg:SI 113)
- (unspec:SI [
+ (unspec_volatile:SI [
(match_dup 1)
(match_dup 2)
- ] 3451))]
+ ] 3450))]
"CGEN_ENABLE_INSN_P (391)"
"cpssub3.w\\t%0,%1,%2"
[(set_attr "may_trap" "no")
@@ -11451,20 +11441,15 @@
(define_insn "cgen_intrinsic_cpssub3_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3452))
(set (reg:SI 84)
- (unspec:SI [
- (match_dup 1)
- (match_dup 2)
- ] 3454))
- (set (reg:SI 113)
- (unspec:SI [
+ (unspec_volatile:SI [
(match_dup 1)
(match_dup 2)
- ] 3455))]
+ ] 3454))]
"CGEN_ENABLE_INSN_P (392)"
"cpssub3.h\\t%0,%1,%2"
[(set_attr "may_trap" "no")
@@ -11477,20 +11462,15 @@
(define_insn "cgen_intrinsic_cpssub3_h_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3452))
(set (reg:SI 84)
- (unspec:SI [
- (match_dup 1)
- (match_dup 2)
- ] 3454))
- (set (reg:SI 113)
- (unspec:SI [
+ (unspec_volatile:SI [
(match_dup 1)
(match_dup 2)
- ] 3455))]
+ ] 3454))]
"CGEN_ENABLE_INSN_P (393)"
"cpssub3.h\\t%0,%1,%2"
[(set_attr "may_trap" "no")
@@ -11503,7 +11483,7 @@
(define_insn "cgen_intrinsic_cpsadd3_w_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3456))]
@@ -11519,7 +11499,7 @@
(define_insn "cgen_intrinsic_cpsadd3_w_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3456))]
@@ -11535,7 +11515,7 @@
(define_insn "cgen_intrinsic_cpsadd3_h_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3458))]
@@ -11551,7 +11531,7 @@
(define_insn "cgen_intrinsic_cpsadd3_h_P0_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3458))]
@@ -11731,7 +11711,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3218))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11767,7 +11747,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3220))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11803,7 +11783,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3222))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11839,7 +11819,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3224))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11875,7 +11855,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3226))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11911,7 +11891,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3228))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11947,7 +11927,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3230))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -11983,7 +11963,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3232))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12019,7 +11999,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3234))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12055,7 +12035,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3236))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12091,7 +12071,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3238))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12127,7 +12107,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3240))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12163,7 +12143,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3242))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12199,7 +12179,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3244))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12235,7 +12215,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3246))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12271,7 +12251,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3248))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12307,7 +12287,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3250))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12343,7 +12323,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3252))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12379,7 +12359,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3254))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12415,7 +12395,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3256))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12451,7 +12431,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3258))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12487,7 +12467,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3260))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12523,7 +12503,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3262))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12559,7 +12539,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3264))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12595,7 +12575,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3266))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12631,7 +12611,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3268))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12667,7 +12647,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3270))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12703,7 +12683,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3272))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12739,7 +12719,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3274))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12775,7 +12755,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3276))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12811,7 +12791,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3278))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -12847,7 +12827,7 @@
(match_operand:DI 0 "general_operand" "x")
(match_operand:DI 1 "general_operand" "x")
] 3280))
- (set (reg:SI 114)
+ (set (reg:SI 113)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -13957,7 +13937,7 @@
(define_insn "cgen_intrinsic_cpmovhla0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1822))]
"CGEN_ENABLE_INSN_P (498)"
@@ -13972,7 +13952,7 @@
(define_insn "cgen_intrinsic_cpmovhua0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1824))]
"CGEN_ENABLE_INSN_P (499)"
@@ -13987,7 +13967,7 @@
(define_insn "cgen_intrinsic_cppackla0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1826))]
"CGEN_ENABLE_INSN_P (500)"
@@ -14002,7 +13982,7 @@
(define_insn "cgen_intrinsic_cppackua0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1828))]
"CGEN_ENABLE_INSN_P (501)"
@@ -14017,7 +13997,7 @@
(define_insn "cgen_intrinsic_cppackla0_h_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1830))]
"CGEN_ENABLE_INSN_P (502)"
@@ -14032,7 +14012,7 @@
(define_insn "cgen_intrinsic_cppackua0_h_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1832))]
"CGEN_ENABLE_INSN_P (503)"
@@ -14047,7 +14027,7 @@
(define_insn "cgen_intrinsic_cppacka0_b_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1834))]
"CGEN_ENABLE_INSN_P (504)"
@@ -14062,7 +14042,7 @@
(define_insn "cgen_intrinsic_cppacka0u_b_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1836))]
"CGEN_ENABLE_INSN_P (505)"
@@ -14077,7 +14057,7 @@
(define_insn "cgen_intrinsic_cpmovlla0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1838))]
"CGEN_ENABLE_INSN_P (506)"
@@ -14092,7 +14072,7 @@
(define_insn "cgen_intrinsic_cpmovlua0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1840))]
"CGEN_ENABLE_INSN_P (507)"
@@ -14107,7 +14087,7 @@
(define_insn "cgen_intrinsic_cpmovula0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1842))]
"CGEN_ENABLE_INSN_P (508)"
@@ -14122,7 +14102,7 @@
(define_insn "cgen_intrinsic_cpmovuua0_w_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1844))]
"CGEN_ENABLE_INSN_P (509)"
@@ -14137,7 +14117,7 @@
(define_insn "cgen_intrinsic_cpmovla0_h_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1846))]
"CGEN_ENABLE_INSN_P (510)"
@@ -14152,7 +14132,7 @@
(define_insn "cgen_intrinsic_cpmovua0_h_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1848))]
"CGEN_ENABLE_INSN_P (511)"
@@ -14167,7 +14147,7 @@
(define_insn "cgen_intrinsic_cpmova0_b_P0S"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 1850))]
"CGEN_ENABLE_INSN_P (512)"
@@ -15967,7 +15947,7 @@
(define_insn "cgen_intrinsic_cpmovfrcc_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3384))]
"CGEN_ENABLE_INSN_P (580)"
@@ -15982,7 +15962,7 @@
(define_insn "cgen_intrinsic_cpmovfrcc_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3384))]
"CGEN_ENABLE_INSN_P (581)"
@@ -15997,7 +15977,7 @@
(define_insn "cgen_intrinsic_cpmovfrcsar1_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3386))]
"CGEN_ENABLE_INSN_P (582)"
@@ -16012,7 +15992,7 @@
(define_insn "cgen_intrinsic_cpmovfrcsar1_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3386))]
"CGEN_ENABLE_INSN_P (583)"
@@ -16027,7 +16007,7 @@
(define_insn "cgen_intrinsic_cpmovfrcsar0_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3388))]
"CGEN_ENABLE_INSN_P (584)"
@@ -16042,7 +16022,7 @@
(define_insn "cgen_intrinsic_cpmovfrcsar0_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(const_int 0)
] 3388))]
"CGEN_ENABLE_INSN_P (585)"
@@ -16627,7 +16607,7 @@
(define_insn "cgen_intrinsic_cpccadd_b_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "0")
] 3354))]
"CGEN_ENABLE_INSN_P (624)"
@@ -16642,7 +16622,7 @@
(define_insn "cgen_intrinsic_cpccadd_b_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "0")
] 3354))]
"CGEN_ENABLE_INSN_P (625)"
@@ -17017,7 +16997,7 @@
(define_insn "cgen_intrinsic_cpfsftbs1_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3524))]
@@ -17033,7 +17013,7 @@
(define_insn "cgen_intrinsic_cpfsftbs1_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3524))]
@@ -17049,7 +17029,7 @@
(define_insn "cgen_intrinsic_cpfsftbs0_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3526))]
@@ -17065,7 +17045,7 @@
(define_insn "cgen_intrinsic_cpfsftbs0_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3526))]
@@ -17081,7 +17061,7 @@
(define_insn "cgen_intrinsic_cpsel_C3"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3530))]
@@ -17097,7 +17077,7 @@
(define_insn "cgen_intrinsic_cpsel_P0S_P1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=x")
- (unspec:DI [
+ (unspec_volatile:DI [
(match_operand:DI 1 "general_operand" "x")
(match_operand:DI 2 "general_operand" "x")
] 3530))]
@@ -17627,7 +17607,7 @@
(reg:SI 32)
(reg:SI 42)
] 3558))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -17656,7 +17636,7 @@
(reg:SI 32)
(reg:SI 42)
] 3562))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -18800,7 +18780,7 @@
(reg:SI 41)
(reg:SI 40)
] 3724))
- (set (reg:SI 116)
+ (set (reg:SI 115)
(unspec:SI [
(reg:SI 41)
(reg:SI 40)
@@ -18826,7 +18806,7 @@
(match_dup 0)
(match_dup 1)
] 3728))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -18836,7 +18816,7 @@
(match_dup 0)
(match_dup 1)
] 3730))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -18862,7 +18842,7 @@
(match_dup 0)
(match_dup 1)
] 3734))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -18872,7 +18852,7 @@
(match_dup 0)
(match_dup 1)
] 3736))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -18902,7 +18882,7 @@
(reg:SI 24)
(reg:SI 23)
] 3740))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -18916,7 +18896,7 @@
(reg:SI 24)
(reg:SI 23)
] 3742))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -18948,7 +18928,7 @@
(reg:SI 24)
(reg:SI 23)
] 3746))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -18962,7 +18942,7 @@
(reg:SI 24)
(reg:SI 23)
] 3748))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -18987,7 +18967,7 @@
(reg:SI 24)
(reg:SI 23)
] 3750))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19001,7 +18981,7 @@
(reg:SI 24)
(reg:SI 23)
] 3752))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19026,7 +19006,7 @@
(reg:SI 24)
(reg:SI 23)
] 3754))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19040,7 +19020,7 @@
(reg:SI 24)
(reg:SI 23)
] 3756))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19068,7 +19048,7 @@
(match_dup 1)
(match_dup 2)
] 3760))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -19078,7 +19058,7 @@
(match_dup 1)
(match_dup 2)
] 3762))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -19104,7 +19084,7 @@
(match_dup 1)
(match_dup 2)
] 3766))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -19114,7 +19094,7 @@
(match_dup 1)
(match_dup 2)
] 3768))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 1)
(match_dup 2)
@@ -19135,7 +19115,7 @@
(match_operand:SI 0 "general_operand" "r")
(match_operand:SI 1 "general_operand" "r")
] 3770))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19145,7 +19125,7 @@
(match_dup 0)
(match_dup 1)
] 3772))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19166,7 +19146,7 @@
(match_operand:SI 0 "general_operand" "r")
(match_operand:SI 1 "general_operand" "r")
] 3774))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19176,7 +19156,7 @@
(match_dup 0)
(match_dup 1)
] 3776))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19528,7 +19508,7 @@
(unspec:SI [
(match_operand:SI 0 "general_operand" "r")
] 3822))
- (set (reg:SI 117)
+ (set (reg:SI 116)
(unspec:SI [
(match_dup 0)
] 3823))]
@@ -19547,7 +19527,7 @@
(unspec:SI [
(match_operand:SI 0 "general_operand" "r")
] 3824))
- (set (reg:SI 118)
+ (set (reg:SI 117)
(unspec:SI [
(match_dup 0)
] 3825))]
@@ -19566,7 +19546,7 @@
(unspec:SI [
(match_operand:SI 0 "general_operand" "r")
] 3826))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
] 3827))]
@@ -19587,7 +19567,7 @@
(reg:SI 32)
(reg:SI 42)
] 3828))
- (set (reg:SI 119)
+ (set (reg:SI 118)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -19599,7 +19579,7 @@
(reg:SI 32)
(reg:SI 42)
] 3830))
- (set (reg:SI 120)
+ (set (reg:SI 119)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -19611,7 +19591,7 @@
(reg:SI 32)
(reg:SI 42)
] 3832))
- (set (reg:SI 121)
+ (set (reg:SI 120)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -19635,7 +19615,7 @@
(reg:SI 32)
(reg:SI 42)
] 3834))
- (set (reg:SI 119)
+ (set (reg:SI 118)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19649,7 +19629,7 @@
(reg:SI 32)
(reg:SI 42)
] 3836))
- (set (reg:SI 120)
+ (set (reg:SI 119)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19663,7 +19643,7 @@
(reg:SI 32)
(reg:SI 42)
] 3838))
- (set (reg:SI 121)
+ (set (reg:SI 120)
(unspec:SI [
(match_dup 0)
(match_dup 1)
@@ -19710,7 +19690,7 @@
(reg:SI 32)
(reg:SI 42)
] 3844))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -19779,7 +19759,7 @@
(reg:SI 32)
(reg:SI 42)
] 3856))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -19811,7 +19791,7 @@
(reg:SI 32)
(reg:SI 42)
] 3852))
- (set (reg:SI 115)
+ (set (reg:SI 114)
(unspec:SI [
(match_dup 0)
(reg:SI 32)
@@ -20023,7 +20003,7 @@
(define_insn "cgen_intrinsic_fsft"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r")
- (unspec:SI [
+ (unspec_volatile:SI [
(match_operand:SI 1 "general_operand" "0")
(match_operand:SI 2 "general_operand" "r")
(reg:SI 18)
@@ -20609,15 +20589,10 @@
(define_insn "cgen_intrinsic_ssarb"
[(set (reg:SI 18)
- (unspec:SI [
+ (unspec_volatile:SI [
(match_operand:SI 0 "cgen_h_sint_2a1_immediate" "")
(match_operand:SI 1 "general_operand" "r")
- ] 3950))
- (set (reg:SI 122)
- (unspec:SI [
- (match_dup 0)
- (match_dup 1)
- ] 3951))]
+ ] 3950))]
"CGEN_ENABLE_INSN_P (834)"
"ssarb\\t%0(%1)"
[(set_attr "may_trap" "no")
diff --git a/gcc/config/mep/mep-core.cpu b/gcc/config/mep/mep-core.cpu
index 5da01a8..cfcdd42 100644
--- a/gcc/config/mep/mep-core.cpu
+++ b/gcc/config/mep/mep-core.cpu
@@ -1379,7 +1379,7 @@
; Shift amount manipulation instructions.
-(dnci ssarb "set sar to bytes" ((STALL SSARB))
+(dnci ssarb "set sar to bytes" ((STALL SSARB) VOLATILE)
"ssarb $udisp2($rm)"
(+ MAJ_1 (f-4 0) (f-5 0) udisp2 rm (f-sub4 12))
(if (c-call BI "big_endian_p")
@@ -1676,7 +1676,7 @@
((mep (unit u-use-gpr (in usereg rn))
(unit u-exec))))
-(dnci fsft "field shift" ((STALL FSFT))
+(dnci fsft "field shift" ((STALL FSFT) VOLATILE)
"fsft $rn,$rm"
(+ MAJ_2 rn rm (f-sub4 15))
(sequence ((DI temp) (QI shamt))
diff --git a/gcc/config/mep/mep-intrin.h b/gcc/config/mep/mep-intrin.h
index cfefde8..d556459 100644
--- a/gcc/config/mep/mep-intrin.h
+++ b/gcc/config/mep/mep-intrin.h
@@ -5,14 +5,14 @@
#ifdef WANT_GCC_DECLARATIONS
#define FIRST_SHADOW_REGISTER 113
-#define LAST_SHADOW_REGISTER 122
+#define LAST_SHADOW_REGISTER 120
#define FIXED_SHADOW_REGISTERS \
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+ 1, 1, 1, 1, 1, 1, 1, 1
#define CALL_USED_SHADOW_REGISTERS FIXED_SHADOW_REGISTERS
#define SHADOW_REG_ALLOC_ORDER \
- 113, 114, 115, 116, 117, 118, 119, 120, 121, 122
+ 113, 114, 115, 116, 117, 118, 119, 120
#define SHADOW_REGISTER_NAMES \
- "$shadow84", "$shadow81", "$shadow17", "$shadow40", "$shadow24", "$shadow23", "$shadow22", "$shadow21", "$shadow20", "$shadow18"
+ "$shadow81", "$shadow17", "$shadow40", "$shadow24", "$shadow23", "$shadow22", "$shadow21", "$shadow20"
diff --git a/gcc/config/mep/mep-ivc2.cpu b/gcc/config/mep/mep-ivc2.cpu
index 1ae0cac..ebb4938 100644
--- a/gcc/config/mep/mep-ivc2.cpu
+++ b/gcc/config/mep/mep-ivc2.cpu
@@ -597,7 +597,7 @@
; 1111 100 ooooo 0111 00001 qqqqq ppppp 0 cpsel =croc,crqc,crpc (c3_1)
(dni cpsel_C3 "cpsel $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsel") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsel") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpsel $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x4) croc (f-sub4 7)
(f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x0) )
@@ -621,7 +621,7 @@
; 1111 110 ooooo 0111 00001 qqqqq ppppp 0 cpfsftbs0 =croc,crqc,crpc (c3_1)
(dni cpfsftbs0_C3 "cpfsftbs0 $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpfsftbs0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpfsftbs0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpfsftbs0 $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x6) croc (f-sub4 7)
(f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x0) )
@@ -633,7 +633,7 @@
; 1111 111 ooooo 0111 00001 qqqqq ppppp 0 cpfsftbs1 =croc,crqc,crpc (c3_1)
(dni cpfsftbs1_C3 "cpfsftbs1 $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpfsftbs1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpfsftbs1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpfsftbs1 $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x7) croc (f-sub4 7)
(f-ivc2-5u16 #x1) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1005,7 +1005,7 @@
; 1111 010 ooooo 0111 00111 qqqqq ppppp 0 cpsla3.h =croc,crqc,crpc (c3_1)
(dni cpsla3_h_C3 "cpsla3.h $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsla3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsla3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpsla3.h $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x2) croc (f-sub4 7)
(f-ivc2-5u16 #x7) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1017,7 +1017,7 @@
; 1111 100 ooooo 0111 00111 qqqqq ppppp 0 cpsla3.w =croc,crqc,crpc (c3_1)
(dni cpsla3_w_C3 "cpsla3.w $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsla3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsla3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpsla3.w $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x4) croc (f-sub4 7)
(f-ivc2-5u16 #x7) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1029,7 +1029,7 @@
; 1111 010 ooooo 0111 01000 qqqqq ppppp 0 cpsadd3.h =croc,crqc,crpc (c3_1)
(dni cpsadd3_h_C3 "cpsadd3.h $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadd3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadd3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpsadd3.h $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x2) croc (f-sub4 7)
(f-ivc2-5u16 #x8) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1041,7 +1041,7 @@
; 1111 011 ooooo 0111 01000 qqqqq ppppp 0 cpsadd3.w =croc,crqc,crpc (c3_1)
(dni cpsadd3_w_C3 "cpsadd3.w $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadd3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpsadd3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpsadd3.w $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x3) croc (f-sub4 7)
(f-ivc2-5u16 #x8) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1053,7 +1053,7 @@
; 1111 110 ooooo 0111 01000 qqqqq ppppp 0 cpssub3.h =croc,crqc,crpc (c3_1)
(dni cpssub3_h_C3 "cpssub3.h $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssub3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssub3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpssub3.h $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x6) croc (f-sub4 7)
(f-ivc2-5u16 #x8) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1066,7 +1066,7 @@
; 1111 111 ooooo 0111 01000 qqqqq ppppp 0 cpssub3.w =croc,crqc,crpc (c3_1)
(dni cpssub3_w_C3 "cpssub3.w $croc,$crqc,$crpc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssub3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpssub3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpssub3.w $croc,$crqc,$crpc"
(+ MAJ_15 (f-ivc2-3u4 #x7) croc (f-sub4 7)
(f-ivc2-5u16 #x8) crqc crpc (f-ivc2-1u31 #x0) )
@@ -1427,7 +1427,7 @@
; 1111 000 ooooo 0111 10000 00000 00000 0 cpmovfrcsar0 =croc (c3_1)
(dni cpmovfrcsar0_C3 "cpmovfrcsar0 $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcsar0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcsar0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcsar0 $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x10) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x0) )
@@ -1439,7 +1439,7 @@
; 1111 000 ooooo 0111 10000 00000 01111 0 cpmovfrcsar1 =croc (c3_1)
(dni cpmovfrcsar1_C3 "cpmovfrcsar1 $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcsar1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcsar1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcsar1 $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x10) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #xf) (f-ivc2-1u31 #x0) )
@@ -1451,7 +1451,7 @@
; 1111 000 ooooo 0111 10000 00000 00001 0 cpmovfrcc =croc (c3_1)
(dni cpmovfrcc_C3 "cpmovfrcc $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcc") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovfrcc") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcc $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x10) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x1) (f-ivc2-1u31 #x0) )
@@ -1643,7 +1643,7 @@
; 1111 000 ooooo 0111 10001 qqqqq 01100 0 cpccadd.b +crqc (c3_1)
(dni cpccadd_b_C3 "cpccadd.b $crqc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpccadd_b") (CPTYPE V8QI) (CRET FIRSTCOPY))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpccadd_b") (CPTYPE V8QI) (CRET FIRSTCOPY) VOLATILE)
"cpccadd.b $crqc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x11) crqc (f-ivc2-5u26 #xc) (f-ivc2-1u31 #x0) )
@@ -2664,7 +2664,7 @@
; 1111 01xx iiii 0111 10111 qqqqq ppppp 0 cpslai3.h =crqc,crpc,imm4p8 (c3_imm)
(dni cpslai3_h_C3 "cpslai3.h $crqc,$crpc,imm4p8 C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslai3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslai3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpslai3.h $crqc,$crpc,$imm4p8"
(+ MAJ_15 ivc-x-6-2 (f-ivc2-2u4 #x1) imm4p8 (f-sub4 7)
(f-ivc2-5u16 #x17) crqc crpc (f-ivc2-1u31 #x0) )
@@ -2676,7 +2676,7 @@
; 1111 10xi iiii 0111 10111 qqqqq ppppp 0 cpslai3.w =crqc,crpc,imm5p7 (c3_imm)
(dni cpslai3_w_C3 "cpslai3.w $crqc,$crpc,imm5p7 C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslai3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpslai3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpslai3.w $crqc,$crpc,$imm5p7"
(+ MAJ_15 ivc-x-6-1 (f-ivc2-2u4 #x2) imm5p7 (f-sub4 7)
(f-ivc2-5u16 #x17) crqc crpc (f-ivc2-1u31 #x0) )
@@ -3316,7 +3316,7 @@
; 1111 000 ooooo 0111 00100 00000 00000 1 cpmova1.b =croc (c3_1)
(dni cpmova1_b_C3 "cpmova1.b $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmova1_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmova1_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cpmova1.b $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x0) (f-ivc2-1u31 #x1) )
@@ -3328,7 +3328,7 @@
; 1111 000 ooooo 0111 00100 00000 00010 1 cpmovua1.h =croc (c3_1)
(dni cpmovua1_h_C3 "cpmovua1.h $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovua1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovua1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovua1.h $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x2) (f-ivc2-1u31 #x1) )
@@ -3340,7 +3340,7 @@
; 1111 000 ooooo 0111 00100 00000 00011 1 cpmovla1.h =croc (c3_1)
(dni cpmovla1_h_C3 "cpmovla1.h $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovla1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovla1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovla1.h $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x3) (f-ivc2-1u31 #x1) )
@@ -3352,7 +3352,7 @@
; 1111 000 ooooo 0111 00100 00000 00100 1 cpmovuua1.w =croc (c3_1)
(dni cpmovuua1_w_C3 "cpmovuua1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovuua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovuua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovuua1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x4) (f-ivc2-1u31 #x1) )
@@ -3364,7 +3364,7 @@
; 1111 000 ooooo 0111 00100 00000 00101 1 cpmovula1.w =croc (c3_1)
(dni cpmovula1_w_C3 "cpmovula1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovula1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovula1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovula1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x5) (f-ivc2-1u31 #x1) )
@@ -3376,7 +3376,7 @@
; 1111 000 ooooo 0111 00100 00000 00110 1 cpmovlua1.w =croc (c3_1)
(dni cpmovlua1_w_C3 "cpmovlua1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovlua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovlua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlua1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x6) (f-ivc2-1u31 #x1) )
@@ -3388,7 +3388,7 @@
; 1111 000 ooooo 0111 00100 00000 00111 1 cpmovlla1.w =croc (c3_1)
(dni cpmovlla1_w_C3 "cpmovlla1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovlla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovlla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlla1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x7) (f-ivc2-1u31 #x1) )
@@ -3400,7 +3400,7 @@
; 1111 000 ooooo 0111 00100 00000 10000 1 cppacka1u.b =croc (c3_1)
(dni cppacka1u_b_C3 "cppacka1u.b $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppacka1u_b") (CPTYPE V8UQI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppacka1u_b") (CPTYPE V8UQI) (CRET FIRST) VOLATILE)
"cppacka1u.b $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x10) (f-ivc2-1u31 #x1) )
@@ -3412,7 +3412,7 @@
; 1111 000 ooooo 0111 00100 00000 10001 1 cppacka1.b =croc (c3_1)
(dni cppacka1_b_C3 "cppacka1.b $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppacka1_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppacka1_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cppacka1.b $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x11) (f-ivc2-1u31 #x1) )
@@ -3424,7 +3424,7 @@
; 1111 000 ooooo 0111 00100 00000 10010 1 cppackua1.h =croc (c3_1)
(dni cppackua1_h_C3 "cppackua1.h $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackua1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackua1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackua1.h $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x12) (f-ivc2-1u31 #x1) )
@@ -3436,7 +3436,7 @@
; 1111 000 ooooo 0111 00100 00000 10011 1 cppackla1.h =croc (c3_1)
(dni cppackla1_h_C3 "cppackla1.h $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackla1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackla1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackla1.h $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x13) (f-ivc2-1u31 #x1) )
@@ -3448,7 +3448,7 @@
; 1111 000 ooooo 0111 00100 00000 10100 1 cppackua1.w =croc (c3_1)
(dni cppackua1_w_C3 "cppackua1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackua1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x14) (f-ivc2-1u31 #x1) )
@@ -3460,7 +3460,7 @@
; 1111 000 ooooo 0111 00100 00000 10101 1 cppackla1.w =croc (c3_1)
(dni cppackla1_w_C3 "cppackla1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cppackla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackla1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x15) (f-ivc2-1u31 #x1) )
@@ -3472,7 +3472,7 @@
; 1111 000 ooooo 0111 00100 00000 10110 1 cpmovhua1.w =croc (c3_1)
(dni cpmovhua1_w_C3 "cpmovhua1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovhua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovhua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhua1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x16) (f-ivc2-1u31 #x1) )
@@ -3484,7 +3484,7 @@
; 1111 000 ooooo 0111 00100 00000 10111 1 cpmovhla1.w =croc (c3_1)
(dni cpmovhla1_w_C3 "cpmovhla1.w $croc C3"
- (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovhla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-c3-isa (SLOTS C3) (INTRINSIC "cpmovhla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhla1.w $croc"
(+ MAJ_15 (f-ivc2-3u4 #x0) croc (f-sub4 7)
(f-ivc2-5u16 #x4) (f-ivc2-5u21 #x0) (f-ivc2-5u26 #x17) (f-ivc2-1u31 #x1) )
@@ -4530,7 +4530,7 @@
; 00100 qqqqq ppppp ooooo cpsel =crop,crqp,crpp (p0_1)
(dni cpsel_P0S_P1 "cpsel $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpsel") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpsel") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpsel $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x4) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -4541,7 +4541,7 @@
; 01100 qqqqq ppppp ooooo cpfsftbs0 =crop,crqp,crpp (p0_1)
(dni cpfsftbs0_P0S_P1 "cpfsftbs0 $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpfsftbs0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpfsftbs0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpfsftbs0 $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #xc) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -4552,7 +4552,7 @@
; 01101 qqqqq ppppp ooooo cpfsftbs1 =crop,crqp,crpp (p0_1)
(dni cpfsftbs1_P0S_P1 "cpfsftbs1 $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpfsftbs1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpfsftbs1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpfsftbs1 $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #xd) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -4695,7 +4695,7 @@
; 10000 qqqqq 01100 00000 cpccadd.b +crqp (p0_1)
(dni cpccadd_b_P0S_P1 "cpccadd.b $crqp Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpccadd_b") (CPTYPE V8QI) (CRET FIRSTCOPY))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpccadd_b") (CPTYPE V8QI) (CRET FIRSTCOPY) VOLATILE)
"cpccadd.b $crqp"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x10) crqp (f-ivc2-5u18 #xc) (f-ivc2-5u23 #x0) (f-ivc2-4u28 0))
(sequence ()
@@ -4915,7 +4915,7 @@
; 10001 00000 00000 ooooo cpmovfrcsar0 =crop (p0_1)
(dni cpmovfrcsar0_P0S_P1 "cpmovfrcsar0 $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcsar0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcsar0") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcsar0 $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x11) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x0) crop (f-ivc2-4u28 0))
(sequence ()
@@ -4926,7 +4926,7 @@
; 10001 00000 01111 ooooo cpmovfrcsar1 =crop (p0_1)
(dni cpmovfrcsar1_P0S_P1 "cpmovfrcsar1 $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcsar1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcsar1") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcsar1 $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x11) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xf) crop (f-ivc2-4u28 0))
(sequence ()
@@ -4937,7 +4937,7 @@
; 10001 00000 00001 ooooo cpmovfrcc =crop (p0_1)
(dni cpmovfrcc_P0S_P1 "cpmovfrcc $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcc") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-p1-isa (SLOTS P0S,P1) (INTRINSIC "cpmovfrcc") (CPTYPE CP_DATA_BUS_INT) (CRET FIRST) VOLATILE)
"cpmovfrcc $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x11) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5654,7 +5654,7 @@
; 11001 00000 00001 ooooo cpmova0.b =crop (p0_1)
(dni cpmova0_b_P0S "cpmova0.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmova0_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmova0_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cpmova0.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5665,7 +5665,7 @@
; 11001 00000 00010 ooooo cpmovua0.h =crop (p0_1)
(dni cpmovua0_h_P0S "cpmovua0.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovua0_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovua0_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovua0.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x2) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5676,7 +5676,7 @@
; 11001 00000 00011 ooooo cpmovla0.h =crop (p0_1)
(dni cpmovla0_h_P0S "cpmovla0.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovla0_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovla0_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovla0.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x3) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5687,7 +5687,7 @@
; 11001 00000 00100 ooooo cpmovuua0.w =crop (p0_1)
(dni cpmovuua0_w_P0S "cpmovuua0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovuua0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovuua0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovuua0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x4) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5698,7 +5698,7 @@
; 11001 00000 00101 ooooo cpmovula0.w =crop (p0_1)
(dni cpmovula0_w_P0S "cpmovula0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovula0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovula0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovula0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x5) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5709,7 +5709,7 @@
; 11001 00000 00110 ooooo cpmovlua0.w =crop (p0_1)
(dni cpmovlua0_w_P0S "cpmovlua0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovlua0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovlua0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlua0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x6) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5720,7 +5720,7 @@
; 11001 00000 00111 ooooo cpmovlla0.w =crop (p0_1)
(dni cpmovlla0_w_P0S "cpmovlla0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovlla0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovlla0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlla0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x7) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5731,7 +5731,7 @@
; 11001 00000 01000 ooooo cppacka0u.b =crop (p0_1)
(dni cppacka0u_b_P0S "cppacka0u.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppacka0u_b") (CPTYPE V8UQI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppacka0u_b") (CPTYPE V8UQI) (CRET FIRST) VOLATILE)
"cppacka0u.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x8) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5742,7 +5742,7 @@
; 11001 00000 01001 ooooo cppacka0.b =crop (p0_1)
(dni cppacka0_b_P0S "cppacka0.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppacka0_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppacka0_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cppacka0.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x9) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5753,7 +5753,7 @@
; 11001 00000 01010 ooooo cppackua0.h =crop (p0_1)
(dni cppackua0_h_P0S "cppackua0.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackua0_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackua0_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackua0.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xa) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5764,7 +5764,7 @@
; 11001 00000 01011 ooooo cppackla0.h =crop (p0_1)
(dni cppackla0_h_P0S "cppackla0.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackla0_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackla0_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackla0.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xb) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5775,7 +5775,7 @@
; 11001 00000 01100 ooooo cppackua0.w =crop (p0_1)
(dni cppackua0_w_P0S "cppackua0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackua0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackua0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackua0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xc) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5786,7 +5786,7 @@
; 11001 00000 01101 ooooo cppackla0.w =crop (p0_1)
(dni cppackla0_w_P0S "cppackla0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackla0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cppackla0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackla0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xd) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5797,7 +5797,7 @@
; 11001 00000 01110 ooooo cpmovhua0.w =crop (p0_1)
(dni cpmovhua0_w_P0S "cpmovhua0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovhua0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovhua0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhua0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xe) crop (f-ivc2-4u28 0))
(sequence ()
@@ -5808,7 +5808,7 @@
; 11001 00000 01111 ooooo cpmovhla0.w =crop (p0_1)
(dni cpmovhla0_w_P0S "cpmovhla0.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovhla0_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0s-isa (SLOTS P0S) (INTRINSIC "cpmovhla0_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhla0.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xf) crop (f-ivc2-4u28 0))
(sequence ()
@@ -6670,7 +6670,7 @@
; 00001010 10100 qqqqq ppppp ooooo cpsadd3.h =crop,crqp,crpp (p0_1)
(dni cpsadd3_h_P0_P1 "cpsadd3.h $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsadd3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsadd3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpsadd3.h $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #xa) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -6681,7 +6681,7 @@
; 00001011 10100 qqqqq ppppp ooooo cpsadd3.w =crop,crqp,crpp (p0_1)
(dni cpsadd3_w_P0_P1 "cpsadd3.w $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsadd3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsadd3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpsadd3.w $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #xb) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -6692,7 +6692,7 @@
; 00001110 10100 qqqqq ppppp ooooo cpssub3.h =crop,crqp,crpp (p0_1)
(dni cpssub3_h_P0_P1 "cpssub3.h $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpssub3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpssub3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpssub3.h $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #xe) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -6704,7 +6704,7 @@
; 00001111 10100 qqqqq ppppp ooooo cpssub3.w =crop,crqp,crpp (p0_1)
(dni cpssub3_w_P0_P1 "cpssub3.w $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpssub3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpssub3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpssub3.w $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #xf) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -7343,7 +7343,7 @@
; 01011010 10100 qqqqq ppppp ooooo cpsla3.h =crop,crqp,crpp (p0_1)
(dni cpsla3_h_P0_P1 "cpsla3.h $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsla3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsla3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpsla3.h $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #x5a) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -7354,7 +7354,7 @@
; 01011100 10100 qqqqq ppppp ooooo cpsla3.w =crop,crqp,crpp (p0_1)
(dni cpsla3_w_P0_P1 "cpsla3.w $crop,$crqp,$crpp Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsla3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpsla3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpsla3.w $crop,$crqp,$crpp"
(+ (f-ivc2-8u0 #x5c) (f-ivc2-5u8 #x14) crqp crpp crop (f-ivc2-4u28 0))
(sequence ()
@@ -7497,7 +7497,7 @@
; xxxxiiii 10101 qqqqq 01101 ooooo cpslai3.h =crop,crqp,imm4p4 (p0_1)
(dni cpslai3_h_P0_P1 "cpslai3.h $crop,$crqp,imm4p4 Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpslai3_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpslai3_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpslai3.h $crop,$crqp,$imm4p4"
(+ ivc-x-0-4 imm4p4 (f-ivc2-5u8 #x15) crqp (f-ivc2-5u18 #xd) crop (f-ivc2-4u28 0))
(sequence ()
@@ -7508,7 +7508,7 @@
; xxxiiiii 10101 qqqqq 01110 ooooo cpslai3.w =crop,crqp,imm5p3 (p0_1)
(dni cpslai3_w_P0_P1 "cpslai3.w $crop,$crqp,imm5p3 Pn"
- (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpslai3_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p0-p1-isa (SLOTS P0,P1) (INTRINSIC "cpslai3_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpslai3.w $crop,$crqp,$imm5p3"
(+ ivc-x-0-3 imm5p3 (f-ivc2-5u8 #x15) crqp (f-ivc2-5u18 #xe) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8109,7 +8109,7 @@
; 00000000 11001 00000 00001 ooooo cpmova1.b =crop (p0_1)
(dni cpmova1_b_P1 "cpmova1.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmova1_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmova1_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cpmova1.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x1) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8120,7 +8120,7 @@
; 00000000 11001 00000 00010 ooooo cpmovua1.h =crop (p0_1)
(dni cpmovua1_h_P1 "cpmovua1.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovua1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovua1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovua1.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x2) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8131,7 +8131,7 @@
; 00000000 11001 00000 00011 ooooo cpmovla1.h =crop (p0_1)
(dni cpmovla1_h_P1 "cpmovla1.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovla1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovla1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cpmovla1.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x3) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8142,7 +8142,7 @@
; 00000000 11001 00000 00100 ooooo cpmovuua1.w =crop (p0_1)
(dni cpmovuua1_w_P1 "cpmovuua1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovuua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovuua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovuua1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x4) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8153,7 +8153,7 @@
; 00000000 11001 00000 00101 ooooo cpmovula1.w =crop (p0_1)
(dni cpmovula1_w_P1 "cpmovula1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovula1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovula1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovula1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x5) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8164,7 +8164,7 @@
; 00000000 11001 00000 00110 ooooo cpmovlua1.w =crop (p0_1)
(dni cpmovlua1_w_P1 "cpmovlua1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovlua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovlua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlua1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x6) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8175,7 +8175,7 @@
; 00000000 11001 00000 00111 ooooo cpmovlla1.w =crop (p0_1)
(dni cpmovlla1_w_P1 "cpmovlla1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovlla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovlla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovlla1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x7) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8186,7 +8186,7 @@
; 00000000 11001 00000 01000 ooooo cppacka1u.b =crop (p0_1)
(dni cppacka1u_b_P1 "cppacka1u.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppacka1u_b") (CPTYPE V8UQI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppacka1u_b") (CPTYPE V8UQI) (CRET FIRST) VOLATILE)
"cppacka1u.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x8) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8197,7 +8197,7 @@
; 00000000 11001 00000 01001 ooooo cppacka1.b =crop (p0_1)
(dni cppacka1_b_P1 "cppacka1.b $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppacka1_b") (CPTYPE V8QI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppacka1_b") (CPTYPE V8QI) (CRET FIRST) VOLATILE)
"cppacka1.b $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #x9) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8208,7 +8208,7 @@
; 00000000 11001 00000 01010 ooooo cppackua1.h =crop (p0_1)
(dni cppackua1_h_P1 "cppackua1.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackua1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackua1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackua1.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xa) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8219,7 +8219,7 @@
; 00000000 11001 00000 01011 ooooo cppackla1.h =crop (p0_1)
(dni cppackla1_h_P1 "cppackla1.h $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackla1_h") (CPTYPE V4HI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackla1_h") (CPTYPE V4HI) (CRET FIRST) VOLATILE)
"cppackla1.h $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xb) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8230,7 +8230,7 @@
; 00000000 11001 00000 01100 ooooo cppackua1.w =crop (p0_1)
(dni cppackua1_w_P1 "cppackua1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackua1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xc) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8241,7 +8241,7 @@
; 00000000 11001 00000 01101 ooooo cppackla1.w =crop (p0_1)
(dni cppackla1_w_P1 "cppackla1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cppackla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cppackla1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xd) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8252,7 +8252,7 @@
; 00000000 11001 00000 01110 ooooo cpmovhua1.w =crop (p0_1)
(dni cpmovhua1_w_P1 "cpmovhua1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovhua1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovhua1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhua1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xe) crop (f-ivc2-4u28 0))
(sequence ()
@@ -8263,7 +8263,7 @@
; 00000000 11001 00000 01111 ooooo cpmovhla1.w =crop (p0_1)
(dni cpmovhla1_w_P1 "cpmovhla1.w $crop Pn"
- (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovhla1_w") (CPTYPE V2SI) (CRET FIRST))
+ (OPTIONAL_CP_INSN ivc2-p1-isa (SLOTS P1) (INTRINSIC "cpmovhla1_w") (CPTYPE V2SI) (CRET FIRST) VOLATILE)
"cpmovhla1.w $crop"
(+ (f-ivc2-8u0 #x0) (f-ivc2-5u8 #x19) (f-ivc2-5u13 #x0) (f-ivc2-5u18 #xf) crop (f-ivc2-4u28 0))
(sequence ()
generated by cgit v1.1 at 2024-11-05 20:58:14 +0000