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| author | Andrew Stubbs <ams@codesourcery.com> | 2019-12-17 13:01:25 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@gcc.gnu.org> | 2019-12-17 13:01:25 +0000 |
| commit | b92d1124e15db0186e616a7c9d4f8e69d92aa015 (patch) | |
| tree | e863707a1535bfa874993ad59c5366457b352f4f /gcc | |
| parent | 34bac26458e59295541a7f485def72721a8981ef (diff) | |
| download | gcc-b92d1124e15db0186e616a7c9d4f8e69d92aa015.zip gcc-b92d1124e15db0186e616a7c9d4f8e69d92aa015.tar.gz gcc-b92d1124e15db0186e616a7c9d4f8e69d92aa015.tar.bz2 | |
Add extract_last for amdgcn
2019-12-17 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/gcn/gcn-valu.md (extract_last_<mode>): New expander.
(fold_extract_last_<mode>): New expander.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_fold_extract_last): Add amdgcn.
From-SVN: r279459
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 42 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 3 |
4 files changed, 54 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5c5b9f4..161768c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2019-12-17 Andrew Stubbs <ams@codesourcery.com> + * config/gcn/gcn-valu.md (extract_last_<mode>): New expander. + (fold_extract_last_<mode>): New expander. + +2019-12-17 Andrew Stubbs <ams@codesourcery.com> + * config/gcn/gcn.h (CLZ_DEFINED_VALUE_AT_ZERO): Define. (CTZ_DEFINED_VALUE_AT_ZERO): Define. * config/gcn/gcn.md (s_mnemonic): Add clz and ctz. diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 4260446..3b3be8a 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -591,6 +591,48 @@ (set_attr "exec" "none") (set_attr "laneselect" "yes")]) +(define_expand "extract_last_<mode>" + [(match_operand:<SCALAR_MODE> 0 "register_operand") + (match_operand:DI 1 "gcn_alu_operand") + (match_operand:VEC_ALLREG_MODE 2 "register_operand")] + "can_create_pseudo_p ()" + { + rtx dst = operands[0]; + rtx mask = operands[1]; + rtx vect = operands[2]; + rtx tmpreg = gen_reg_rtx (SImode); + + emit_insn (gen_clzdi2 (tmpreg, mask)); + emit_insn (gen_subsi3 (tmpreg, GEN_INT (63), tmpreg)); + emit_insn (gen_vec_extract<mode><scalar_mode> (dst, vect, tmpreg)); + DONE; + }) + +(define_expand "fold_extract_last_<mode>" + [(match_operand:<SCALAR_MODE> 0 "register_operand") + (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand") + (match_operand:DI 2 "gcn_alu_operand") + (match_operand:VEC_ALLREG_MODE 3 "register_operand")] + "can_create_pseudo_p ()" + { + rtx dst = operands[0]; + rtx default_value = operands[1]; + rtx mask = operands[2]; + rtx vect = operands[3]; + rtx else_label = gen_label_rtx (); + rtx end_label = gen_label_rtx (); + + rtx cond = gen_rtx_EQ (VOIDmode, mask, const0_rtx); + emit_jump_insn (gen_cbranchdi4 (cond, mask, const0_rtx, else_label)); + emit_insn (gen_extract_last_<mode> (dst, mask, vect)); + emit_jump_insn (gen_jump (end_label)); + emit_barrier (); + emit_label (else_label); + emit_move_insn (dst, default_value); + emit_label (end_label); + DONE; + }) + (define_expand "vec_init<mode><scalar_mode>" [(match_operand:VEC_ALLREG_MODE 0 "register_operand") (match_operand 1)] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5fff39e..28b7400 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2019-12-17 Andrew Stubbs <ams@codesourcery.com> + + * lib/target-supports.exp + (check_effective_target_vect_fold_extract_last): Add amdgcn. + 2019-12-17 Hongyu Wang <hongyu.wang@intel.com> * gcc.target/i386/pr92651.c: New testcase. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 80e9d67..98f1141 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6974,7 +6974,8 @@ proc check_effective_target_vect_logical_reduc { } { # Return 1 if the target supports the fold_extract_last optab. proc check_effective_target_vect_fold_extract_last { } { - return [check_effective_target_aarch64_sve] + return [expr { [check_effective_target_aarch64_sve] + || [istarget amdgcn*-*-*] }] } # Return 1 if the target supports section-anchors |