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authorPan Li <pan2.li@intel.com>2024-06-13 23:05:00 +0800
committerPan Li <pan2.li@intel.com>2024-06-14 22:07:16 +0800
commitb781fb4fe19f00aef886b21acf57b96d52545a0c (patch)
treed4f9f9d58fb14a3149b4631e06dd9079d1f0b1d5 /gcc
parentbfe92c70821bc21df5befae3a39fe6ab31d2cbb4 (diff)
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RISC-V: Add testcases for scalar unsigned SAT_SUB form 6
After the middle-end support the form 6 of unsigned SAT_SUB and the RISC-V backend implement the scalar .SAT_SUB, add more test case to cover the form 6 of unsigned .SAT_SUB. Form 6: #define SAT_SUB_U_6(T) \ T sat_sub_u_6_##T (T x, T y) \ { \ return x <= y ? 0 : x - y; \ } gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add helper macro for test. * gcc.target/riscv/sat_u_sub-21.c: New test. * gcc.target/riscv/sat_u_sub-22.c: New test. * gcc.target/riscv/sat_u_sub-23.c: New test. * gcc.target/riscv/sat_u_sub-24.c: New test. * gcc.target/riscv/sat_u_sub-run-21.c: New test. * gcc.target/riscv/sat_u_sub-run-22.c: New test. * gcc.target/riscv/sat_u_sub-run-23.c: New test. * gcc.target/riscv/sat_u_sub-run-24.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_arith.h8
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-21.c18
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-22.c19
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-23.c18
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-24.c17
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-21.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-22.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-23.c25
-rw-r--r--gcc/testsuite/gcc.target/riscv/sat_u_sub-run-24.c25
9 files changed, 180 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h
index d08755d..4296235 100644
--- a/gcc/testsuite/gcc.target/riscv/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h
@@ -113,11 +113,19 @@ sat_u_sub_##T##_fmt_5 (T x, T y) \
return x < y ? 0 : x - y; \
}
+#define DEF_SAT_U_SUB_FMT_6(T) \
+T __attribute__((noinline)) \
+sat_u_sub_##T##_fmt_6 (T x, T y) \
+{ \
+ return x <= y ? 0 : x - y; \
+}
+
#define RUN_SAT_U_SUB_FMT_1(T, x, y) sat_u_sub_##T##_fmt_1(x, y)
#define RUN_SAT_U_SUB_FMT_2(T, x, y) sat_u_sub_##T##_fmt_2(x, y)
#define RUN_SAT_U_SUB_FMT_3(T, x, y) sat_u_sub_##T##_fmt_3(x, y)
#define RUN_SAT_U_SUB_FMT_4(T, x, y) sat_u_sub_##T##_fmt_4(x, y)
#define RUN_SAT_U_SUB_FMT_5(T, x, y) sat_u_sub_##T##_fmt_5(x, y)
+#define RUN_SAT_U_SUB_FMT_6(T, x, y) sat_u_sub_##T##_fmt_6(x, y)
#define DEF_VEC_SAT_U_SUB_FMT_1(T) \
void __attribute__((noinline)) \
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-21.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-21.c
new file mode 100644
index 0000000..9a8fb7f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-21.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint8_t_fmt_6:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*a0,\s*[atx][0-9]+
+** andi\s+a0,\s*a0,\s*0xff
+** ret
+*/
+DEF_SAT_U_SUB_FMT_6(uint8_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-22.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-22.c
new file mode 100644
index 0000000..6182169
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-22.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint16_t_fmt_6:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** slli\s+a0,\s*a0,\s*48
+** srli\s+a0,\s*a0,\s*48
+** ret
+*/
+DEF_SAT_U_SUB_FMT_6(uint16_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-23.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-23.c
new file mode 100644
index 0000000..820110c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-23.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint32_t_fmt_6:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** sext.w\s+a0,\s*a0
+** ret
+*/
+DEF_SAT_U_SUB_FMT_6(uint32_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-24.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-24.c
new file mode 100644
index 0000000..48e6296
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-24.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "sat_arith.h"
+
+/*
+** sat_u_sub_uint64_t_fmt_6:
+** sub\s+[atx][0-9]+,\s*a0,\s*a1
+** sltu\s+[atx][0-9]+,\s*a0,\s*a1
+** addi\s+a0,\s*[atx][0-9]+,\s*-1
+** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
+** ret
+*/
+DEF_SAT_U_SUB_FMT_6(uint64_t)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-21.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-21.c
new file mode 100644
index 0000000..0b4cbdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-21.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint8_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_6
+
+DEF_SAT_U_SUB_FMT_6(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 255, 254, 1, },
+ { 255, 255, 0, },
+ { 254, 255, 0, },
+ { 253, 254, 0, },
+ { 0, 255, 0, },
+ { 1, 255, 0, },
+ { 32, 5, 27, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-22.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-22.c
new file mode 100644
index 0000000..e0dda45
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-22.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint16_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_6
+
+DEF_SAT_U_SUB_FMT_6(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 65535, 65534, 1, },
+ { 65535, 65535, 0, },
+ { 65534, 65535, 0, },
+ { 65533, 65534, 0, },
+ { 0, 65535, 0, },
+ { 1, 65535, 0, },
+ { 35, 5, 30, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-23.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-23.c
new file mode 100644
index 0000000..dfd95ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-23.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint32_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_6
+
+DEF_SAT_U_SUB_FMT_6(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 4294967295, 4294967294, 1, },
+ { 4294967295, 4294967295, 0, },
+ { 4294967294, 4294967295, 0, },
+ { 4294967293, 4294967294, 0, },
+ { 1, 4294967295, 0, },
+ { 2, 4294967295, 0, },
+ { 5, 1, 4, },
+};
+
+#include "scalar_sat_binary.h"
diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-24.c b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-24.c
new file mode 100644
index 0000000..7cac446
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat_u_sub-run-24.c
@@ -0,0 +1,25 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "sat_arith.h"
+
+#define T uint64_t
+#define RUN_SAT_BINARY RUN_SAT_U_SUB_FMT_6
+
+DEF_SAT_U_SUB_FMT_6(T)
+
+T test_data[][3] = {
+ /* arg_0, arg_1, expect */
+ { 0, 0, 0, },
+ { 0, 1, 0, },
+ { 1, 1, 0, },
+ { 18446744073709551615u, 18446744073709551614u, 1, },
+ { 18446744073709551615u, 18446744073709551615u, 0, },
+ { 18446744073709551614u, 18446744073709551615u, 0, },
+ { 18446744073709551613u, 18446744073709551614u, 0, },
+ { 0, 18446744073709551615u, 0, },
+ { 1, 18446744073709551615u, 0, },
+ { 43, 11, 32, },
+};
+
+#include "scalar_sat_binary.h"