diff options
| author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-05-02 13:26:57 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gcc.gnu.org> | 2016-05-02 13:26:57 +0200 |
| commit | b5a5ade831991092d753d233cb2ac290d2db61cf (patch) | |
| tree | 1a28ee5849edb504e312474081a397cba10e29b7 /gcc | |
| parent | e91cacaedb0ef7c9674af7f8920de5952bbb7fbb (diff) | |
| download | gcc-b5a5ade831991092d753d233cb2ac290d2db61cf.zip gcc-b5a5ade831991092d753d233cb2ac290d2db61cf.tar.gz gcc-b5a5ade831991092d753d233cb2ac290d2db61cf.tar.bz2 | |
[ARC] Various instruction pattern fixes
gcc/
2016-05-02 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (mulsidi3): Change operand 0 predicate to
register_operand.
(umulsidi3): Likewise.
(indirect_jump): Fix jump instruction assembly patterns.
From-SVN: r235749
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arc/arc.md | 19 |
2 files changed, 19 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f344e0f..a098272 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-05-02 Claudiu Zissulescu <claziss@synopsys.com> + + * config/arc/arc.md (mulsidi3): Change operand 0 predicate to + register_operand. + (umulsidi3): Likewise. + (indirect_jump): Fix jump instruction assembly patterns. + 2016-05-02 Thomas Schwinge <thomas@codesourcery.com> PR target/70860 diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 85e5458..a4ee084 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -2079,9 +2079,9 @@ (set_attr "cond" "nocond,canuse,nocond,canuse_limm,canuse,nocond")]) (define_expand "mulsidi3" - [(set (match_operand:DI 0 "nonimmediate_operand" "") - (mult:DI (sign_extend:DI(match_operand:SI 1 "register_operand" "")) - (sign_extend:DI(match_operand:SI 2 "nonmemory_operand" ""))))] + [(set (match_operand:DI 0 "register_operand" "") + (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "")) + (sign_extend:DI (match_operand:SI 2 "nonmemory_operand" ""))))] "TARGET_ANY_MPY" " { @@ -2315,9 +2315,9 @@ }") (define_expand "umulsidi3" - [(set (match_operand:DI 0 "nonimmediate_operand" "") - (mult:DI (zero_extend:DI(match_operand:SI 1 "register_operand" "")) - (zero_extend:DI(match_operand:SI 2 "nonmemory_operand" ""))))] + [(set (match_operand:DI 0 "register_operand" "") + (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "")) + (zero_extend:DI (match_operand:SI 2 "nonmemory_operand" ""))))] "" { if (TARGET_MPY) @@ -3809,7 +3809,12 @@ (define_insn "indirect_jump" [(set (pc) (match_operand:SI 0 "nonmemory_operand" "L,I,Cal,Rcqq,r"))] "" - "j%!%* [%0]%&" + "@ + j%!%* %0%& + j%!%* %0%& + j%!%* %0%& + j%!%* [%0]%& + j%!%* [%0]%&" [(set_attr "type" "jump") (set_attr "iscompact" "false,false,false,maybe,false") (set_attr "cond" "canuse,canuse_limm,canuse,canuse,canuse")]) |