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authorCarl Love <cel@us.ibm.com>2023-07-26 11:31:53 -0400
committerCarl Love <cel@us.ibm.com>2023-07-26 11:36:25 -0400
commitb51795c832cf6e724d61919eb18a383223b76694 (patch)
tree0e039bb6b084c3474bbfd82bf9cd7c49d94c3629 /gcc
parent9d804f9b2709b38235a2fe4c6705f2af6784aa2a (diff)
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rs6000, fix vec_replace_unaligned built-in arguments
The first argument of the vec_replace_unaligned built-in should always be of type vector unsigned char, as specified in gcc/doc/extend.texi. This patch fixes the builtin definitions and updates the test cases to use the correct arguments. The original test file is renamed and a second test file is added for a new test case. gcc/ChangeLog: * config/rs6000/rs6000-builtins.def: Rename __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si. Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF, VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI. Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as vreplace_un_si, vreplace_un_v2df as vreplace_un_df, vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as vreplace_un_sf, vreplace_un_v4si as vreplace_un_si. * config/rs6000/rs6000-c.cc (find_instance): Add case RS6000_OVLD_VEC_REPLACE_UN. * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un): Fix first argument type. Rename VREPLACE_UN_UV4SI as VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI, VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF, VREPLACE_UN_V2DF as VREPLACE_UN_DF. * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator REPLACE_ELT_V for vector modes. (REPLACE_ELT): New scalar mode iterator. (REPLACE_ELT_char): Add scalar attributes. (vreplace_un_<mode>): Change iterator and mode attribute. gcc/testsuite/ChangeLog: * gcc.target/powerpc/vec-replace-word-runnable.c: Renam vec-replace-word-runnable_1.c. * gcc.target/powerpc/vec-replace-word-runnable_1.c (dg-options): add -flax-vector-conversions. (vec_replace_unaligned) Fix first argument type. (vresult_uchar): Fix expected results. (vec_replace_unaligned): Update for loop to check uchar results. Remove extra spaces in if statements. Insert missing spaces in for statements. * gcc.target/powerpc/vec-replace-word-runnable_2.c: New test file.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/rs6000-builtins.def28
-rw-r--r--gcc/config/rs6000/rs6000-c.cc23
-rw-r--r--gcc/config/rs6000/rs6000-overload.def24
-rw-r--r--gcc/config/rs6000/vsx.md34
-rw-r--r--gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_1.c (renamed from gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c)176
-rw-r--r--gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_2.c49
6 files changed, 212 insertions, 122 deletions
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index b71cce5..35c4cdf 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -3397,26 +3397,26 @@
const vull __builtin_altivec_vpextd (vull, vull);
VPEXTD vpextd {}
- const vuc __builtin_altivec_vreplace_un_uv2di (vull, unsigned long long, \
- const int<4>);
- VREPLACE_UN_UV2DI vreplace_un_v2di {}
+ const vuc __builtin_altivec_vreplace_un_udi (vuc, unsigned long long, \
+ const int<4>);
+ VREPLACE_UN_UDI vreplace_un_di {}
- const vuc __builtin_altivec_vreplace_un_uv4si (vui, unsigned int, \
- const int<4>);
- VREPLACE_UN_UV4SI vreplace_un_v4si {}
+ const vuc __builtin_altivec_vreplace_un_usi (vuc, unsigned int, \
+ const int<4>);
+ VREPLACE_UN_USI vreplace_un_si {}
- const vuc __builtin_altivec_vreplace_un_v2df (vd, double, const int<4>);
- VREPLACE_UN_V2DF vreplace_un_v2df {}
+ const vuc __builtin_altivec_vreplace_un_df (vuc, double, const int<4>);
+ VREPLACE_UN_DF vreplace_un_df {}
- const vuc __builtin_altivec_vreplace_un_v2di (vsll, signed long long, \
+ const vuc __builtin_altivec_vreplace_un_di (vuc, signed long long, \
const int<4>);
- VREPLACE_UN_V2DI vreplace_un_v2di {}
+ VREPLACE_UN_DI vreplace_un_di {}
- const vuc __builtin_altivec_vreplace_un_v4sf (vf, float, const int<4>);
- VREPLACE_UN_V4SF vreplace_un_v4sf {}
+ const vuc __builtin_altivec_vreplace_un_sf (vuc, float, const int<4>);
+ VREPLACE_UN_SF vreplace_un_sf {}
- const vuc __builtin_altivec_vreplace_un_v4si (vsi, signed int, const int<4>);
- VREPLACE_UN_V4SI vreplace_un_v4si {}
+ const vuc __builtin_altivec_vreplace_un_si (vuc, signed int, const int<4>);
+ VREPLACE_UN_SI vreplace_un_si {}
const vull __builtin_altivec_vreplace_uv2di (vull, unsigned long long, \
const int<1>);
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index a353bca..00476f9 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1958,6 +1958,29 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
}
tree call = find_instance (&unsupported_builtin, &instance,
+ instance_code, fcode, types, args, nargs);
+ if (call != error_mark_node)
+ return call;
+ break;
+ }
+ case RS6000_OVLD_VEC_REPLACE_UN:
+ {
+ machine_mode arg2_mode = TYPE_MODE (types[1]);
+
+ if (arg2_mode == SImode)
+ /* Signed and unsigned are handled the same. */
+ instance_code = RS6000_BIF_VREPLACE_UN_USI;
+ else if (arg2_mode == SFmode)
+ instance_code = RS6000_BIF_VREPLACE_UN_SF;
+ else if (arg2_mode == DImode)
+ /* Signed and unsigned are handled the same. */
+ instance_code = RS6000_BIF_VREPLACE_UN_UDI;
+ else if (arg2_mode == DFmode)
+ instance_code = RS6000_BIF_VREPLACE_UN_DF;
+ else
+ break;
+
+ tree call = find_instance (&unsupported_builtin, &instance,
instance_code, fcode, types, args);
if (call != error_mark_node)
return call;
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 470d718..b83946f 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -3059,18 +3059,18 @@
VREPLACE_ELT_V2DF
[VEC_REPLACE_UN, vec_replace_unaligned, __builtin_vec_replace_un]
- vuc __builtin_vec_replace_un (vui, unsigned int, const int);
- VREPLACE_UN_UV4SI
- vuc __builtin_vec_replace_un (vsi, signed int, const int);
- VREPLACE_UN_V4SI
- vuc __builtin_vec_replace_un (vull, unsigned long long, const int);
- VREPLACE_UN_UV2DI
- vuc __builtin_vec_replace_un (vsll, signed long long, const int);
- VREPLACE_UN_V2DI
- vuc __builtin_vec_replace_un (vf, float, const int);
- VREPLACE_UN_V4SF
- vuc __builtin_vec_replace_un (vd, double, const int);
- VREPLACE_UN_V2DF
+ vuc __builtin_vec_replace_un (vuc, unsigned int, const int);
+ VREPLACE_UN_USI
+ vuc __builtin_vec_replace_un (vuc, signed int, const int);
+ VREPLACE_UN_SI
+ vuc __builtin_vec_replace_un (vuc, unsigned long long, const int);
+ VREPLACE_UN_UDI
+ vuc __builtin_vec_replace_un (vuc, signed long long, const int);
+ VREPLACE_UN_DI
+ vuc __builtin_vec_replace_un (vuc, float, const int);
+ VREPLACE_UN_SF
+ vuc __builtin_vec_replace_un (vuc, double, const int);
+ VREPLACE_UN_DF
[VEC_REVB, vec_revb, __builtin_vec_revb]
vss __builtin_vec_revb (vss);
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 1a87f1c..9cd7be2 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -380,10 +380,14 @@
;; Like VI, defined in vector.md, but add ISA 2.07 integer vector ops
(define_mode_iterator VI2 [V4SI V8HI V16QI V2DI])
-;; Vector extract_elt iterator/attr for 32-bit and 64-bit elements
-(define_mode_iterator REPLACE_ELT [V4SI V4SF V2DI V2DF])
+;; Aligned and unaligned vector replace iterator/attr for 32-bit and
+;; 64-bit elements
+(define_mode_iterator REPLACE_ELT_V [V4SI V4SF V2DI V2DF])
+(define_mode_iterator REPLACE_ELT [SI SF DI DF])
(define_mode_attr REPLACE_ELT_char [(V4SI "w") (V4SF "w")
- (V2DI "d") (V2DF "d")])
+ (V2DI "d") (V2DF "d")
+ (SI "w") (SF "w")
+ (DI "d") (DF "d")])
(define_mode_attr REPLACE_ELT_sh [(V4SI "2") (V4SF "2")
(V2DI "3") (V2DF "3")])
(define_mode_attr REPLACE_ELT_max [(V4SI "12") (V4SF "12")
@@ -4183,11 +4187,11 @@
[(set_attr "type" "vecsimple")])
(define_expand "vreplace_elt_<mode>"
- [(set (match_operand:REPLACE_ELT 0 "register_operand")
- (unspec:REPLACE_ELT [(match_operand:REPLACE_ELT 1 "register_operand")
- (match_operand:<VEC_base> 2 "register_operand")
- (match_operand:QI 3 "const_0_to_3_operand")]
- UNSPEC_REPLACE_ELT))]
+ [(set (match_operand:REPLACE_ELT_V 0 "register_operand")
+ (unspec:REPLACE_ELT_V [(match_operand:REPLACE_ELT_V 1 "register_operand")
+ (match_operand:<VEC_base> 2 "register_operand")
+ (match_operand:QI 3 "const_0_to_3_operand")]
+ UNSPEC_REPLACE_ELT))]
"TARGET_POWER10"
{
int index;
@@ -4207,19 +4211,19 @@
[(set_attr "type" "vecsimple")])
(define_insn "vreplace_elt_<mode>_inst"
- [(set (match_operand:REPLACE_ELT 0 "register_operand" "=v")
- (unspec:REPLACE_ELT [(match_operand:REPLACE_ELT 1 "register_operand" "0")
- (match_operand:<VEC_base> 2 "register_operand" "r")
- (match_operand:QI 3 "const_0_to_12_operand" "n")]
- UNSPEC_REPLACE_ELT))]
+ [(set (match_operand:REPLACE_ELT_V 0 "register_operand" "=v")
+ (unspec:REPLACE_ELT_V [(match_operand:REPLACE_ELT_V 1 "register_operand" "0")
+ (match_operand:<VEC_base> 2 "register_operand" "r")
+ (match_operand:QI 3 "const_0_to_12_operand" "n")]
+ UNSPEC_REPLACE_ELT))]
"TARGET_POWER10"
"vins<REPLACE_ELT_char> %0,%2,%3"
[(set_attr "type" "vecsimple")])
(define_insn "vreplace_un_<mode>"
[(set (match_operand:V16QI 0 "register_operand" "=v")
- (unspec:V16QI [(match_operand:REPLACE_ELT 1 "register_operand" "0")
- (match_operand:<VEC_base> 2 "register_operand" "r")
+ (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "0")
+ (match_operand:REPLACE_ELT 2 "register_operand" "r")
(match_operand:QI 3 "const_0_to_12_operand" "n")]
UNSPEC_REPLACE_UN))]
"TARGET_POWER10"
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_1.c
index 2731882..253395d 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_1.c
@@ -20,6 +20,9 @@ main (int argc, char *argv [])
unsigned char ch;
unsigned int index;
+ vector unsigned char src_va_uchar;
+ vector unsigned char expected_vresult_uchar;
+
vector unsigned int vresult_uint;
vector unsigned int expected_vresult_uint;
vector unsigned int src_va_uint;
@@ -64,10 +67,10 @@ main (int argc, char *argv [])
vresult_uint = vec_replace_elt (src_va_uint, src_a_uint, 2);
- if (!vec_all_eq (vresult_uint, expected_vresult_uint)) {
+ if (!vec_all_eq (vresult_uint, expected_vresult_uint)) {
#if DEBUG
printf("ERROR, vec_replace_elt (src_vb_uint, src_va_uint, index)\n");
- for(i = 0; i < 4; i++)
+ for (i = 0; i < 4; i++)
printf(" vresult_uint[%d] = %d, expected_vresult_uint[%d] = %d\n",
i, vresult_uint[i], i, expected_vresult_uint[i]);
#else
@@ -82,10 +85,10 @@ main (int argc, char *argv [])
vresult_int = vec_replace_elt (src_va_int, src_a_int, 1);
- if (!vec_all_eq (vresult_int, expected_vresult_int)) {
+ if (!vec_all_eq (vresult_int, expected_vresult_int)) {
#if DEBUG
- printf("ERROR, vec_replace_elt (src_vb_int, src_va_int, index)\n");
- for(i = 0; i < 4; i++)
+ printf("ERROR, vec_replace_elt (src_vb_int, src_a_int, index)\n");
+ for (i = 0; i < 4; i++)
printf(" vresult_int[%d] = %d, expected_vresult_int[%d] = %d\n",
i, vresult_int[i], i, expected_vresult_int[i]);
#else
@@ -100,10 +103,10 @@ main (int argc, char *argv [])
vresult_float = vec_replace_elt (src_va_float, src_a_float, 1);
- if (!vec_all_eq (vresult_float, expected_vresult_float)) {
+ if (!vec_all_eq (vresult_float, expected_vresult_float)) {
#if DEBUG
- printf("ERROR, vec_replace_elt (src_vb_float, src_va_float, index)\n");
- for(i = 0; i < 4; i++)
+ printf("ERROR, vec_replace_elt (src_vb_float, src_a_float, index)\n");
+ for (i = 0; i < 4; i++)
printf(" vresult_float[%d] = %f, expected_vresult_float[%d] = %f\n",
i, vresult_float[i], i, expected_vresult_float[i]);
#else
@@ -121,8 +124,8 @@ main (int argc, char *argv [])
if (!vec_all_eq (vresult_ullint, expected_vresult_ullint)) {
#if DEBUG
- printf("ERROR, vec_replace_elt (src_vb_ullint, src_va_ullint, index)\n");
- for(i = 0; i < 2; i++)
+ printf("ERROR, vec_replace_elt (src_vb_ullint, src_a_ullint, index)\n");
+ for (i = 0; i < 2; i++)
printf(" vresult_ullint[%d] = %d, expected_vresult_ullint[%d] = %d\n",
i, vresult_ullint[i], i, expected_vresult_ullint[i]);
#else
@@ -137,10 +140,10 @@ main (int argc, char *argv [])
vresult_llint = vec_replace_elt (src_va_llint, src_a_llint, 1);
- if (!vec_all_eq (vresult_llint, expected_vresult_llint)) {
+ if (!vec_all_eq (vresult_llint, expected_vresult_llint)) {
#if DEBUG
- printf("ERROR, vec_replace_elt (src_vb_llint, src_va_llint, index)\n");
- for(i = 0; i < 2; i++)
+ printf("ERROR, vec_replace_elt (src_vb_llint, src_a_llint, index)\n");
+ for (i = 0; i < 2; i++)
printf(" vresult_llint[%d] = %d, expected_vresult_llint[%d] = %d\n",
i, vresult_llint[i], i, expected_vresult_llint[i]);
#else
@@ -155,10 +158,10 @@ main (int argc, char *argv [])
vresult_double = vec_replace_elt (src_va_double, src_a_double, 1);
- if (!vec_all_eq (vresult_double, expected_vresult_double)) {
+ if (!vec_all_eq (vresult_double, expected_vresult_double)) {
#if DEBUG
- printf("ERROR, vec_replace_elt (src_vb_double, src_va_double, index)\n");
- for(i = 0; i < 2; i++)
+ printf("ERROR, vec_replace_elt (src_vb_double, src_a_double, index)\n");
+ for (i = 0; i < 2; i++)
printf(" vresult_double[%d] = %f, expected_vresult_double[%d] = %f\n",
i, vresult_double[i], i, expected_vresult_double[i]);
#else
@@ -169,60 +172,68 @@ main (int argc, char *argv [])
/* Vector replace 32-bit element, unaligned */
src_a_uint = 345;
- src_va_uint = (vector unsigned int) { 1, 2, 0, 0 };
- vresult_uint = (vector unsigned int) { 0, 0, 0, 0 };
+ src_va_uchar = (vector unsigned char) { 1, 0, 0, 0, 2, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
+ vresult_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
/* Byte index 7 will overwrite part of elements 2 and 3 */
- expected_vresult_uint = (vector unsigned int) { 1, 2, 345*256, 0 };
+ expected_vresult_uchar
+ = (vector unsigned char) { 1, 0, 0, 0, 2, 0, 0, 0,
+ 0, 0x59, 0x1, 0, 0, 0, 0, 0 };
- vresult_uchar = vec_replace_unaligned (src_va_uint, src_a_uint, 3);
- vresult_uint = (vector unsigned int) vresult_uchar;
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_uint, 3);
- if (!vec_all_eq (vresult_uint, expected_vresult_uint)) {
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_uint, src_va_uint, index)\n");
- for(i = 0; i < 4; i++)
- printf(" vresult_uint[%d] = %d, expected_vresult_uint[%d] = %d\n",
- i, vresult_uint[i], i, expected_vresult_uint[i]);
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_uint, index)\n");
+ for (i = 0; i < 16; i++)
+ printf(" vresult_uchar[%d] = 0x%x, expected_vresult_uint[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
}
src_a_int = 234;
- src_va_int = (vector int) { 1, 0, 3, 4 };
- vresult_int = (vector int) { 0, 0, 0, 0 };
+ src_va_uchar = (vector unsigned char) { 1, 0, 0, 0, 0, 0, 0, 0,
+ 3, 0, 0, 0, 4, 0, 0, 0 };
+ vresult_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
/* Byte index 7 will over write part of elements 1 and 2 */
- expected_vresult_int = (vector int) { 1, 234*256, 0, 4 };
-
- vresult_uchar = vec_replace_unaligned (src_va_int, src_a_int, 7);
- vresult_int = (vector signed int) vresult_uchar;
+ expected_vresult_uchar = (vector unsigned char) { 1, 0, 0, 0, 0, 0xea, 0, 0,
+ 0, 0, 0, 0, 4, 0, 0, 0 };
- if (!vec_all_eq (vresult_int, expected_vresult_int)) {
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_int, 7);
+
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_int, src_va_int, index)\n");
- for(i = 0; i < 4; i++)
- printf(" vresult_int[%d] = %d, expected_vresult_int[%d] = %d\n",
- i, vresult_int[i], i, expected_vresult_int[i]);
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_int, index)\n");
+ for (i = 0; i < 16; i++)
+ printf(" vresult_int[%d] = 0x%x, expected_vresult_int[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
}
src_a_float = 34.0;
- src_va_float = (vector float) { 0.0, 10.0, 20.0, 30.0 };
- vresult_float = (vector float) { 0.0, 0.0, 0.0, 0.0 };
- expected_vresult_float = (vector float) { 0.0, 34.0, 20.0, 30.0 };
+ src_va_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0x41, 0xa0,
+ 5, 6, 7, 8, 0x41, 0xf0, 0, 0};
+ vresult_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
+ expected_vresult_uchar
+ = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 8, 0x42,
+ 5, 6, 7, 8, 0x41, 0xf0, 0, 0 };
- vresult_uchar = vec_replace_unaligned (src_va_float, src_a_float, 8);
- vresult_float = (vector float) vresult_uchar;
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_float, 8);
- if (!vec_all_eq (vresult_float, expected_vresult_float)) {
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_float, src_va_float, "
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_float, "
"index)\n");
- for(i = 0; i < 4; i++)
- printf(" vresult_float[%d] = %f, expected_vresult_float[%d] = %f\n",
- i, vresult_float[i], i, expected_vresult_float[i]);
+ for (i = 0; i < 16; i++)
+ printf(" vresult_uchar[%d] = 0x%x, expected_vresult_uchar[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
@@ -230,72 +241,75 @@ main (int argc, char *argv [])
/* Vector replace 64-bit element, unaligned */
src_a_ullint = 456;
- src_va_ullint = (vector unsigned long long int) { 0, 0x222 };
- vresult_ullint = (vector unsigned long long int) { 0, 0 };
- expected_vresult_ullint = (vector unsigned long long int) { 456*256,
- 0x200 };
+ src_va_uchar = (vector unsigned char) { 0, 0xc, 0x1, 0, 0, 0, 0, 0,
+ 0x22, 0x2, 0, 0, 0, 0, 0, 0 };
+ vresult_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
+ expected_vresult_uchar
+ = (vector unsigned char) { 0, 0xc8, 0x1, 0, 0, 0, 0, 0,
+ 0, 2, 0, 0, 0, 0, 0, 0 };
/* Byte index 7 will over write least significant byte of element 0 */
- vresult_uchar = vec_replace_unaligned (src_va_ullint, src_a_ullint, 7);
- vresult_ullint = (vector unsigned long long) vresult_uchar;
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_ullint, 7);
- if (!vec_all_eq (vresult_ullint, expected_vresult_ullint)) {
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_ullint, src_va_ullint, "
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_ullint, "
"index)\n");
- for(i = 0; i < 2; i++)
- printf(" vresult_ullint[%d] = %d, expected_vresult_ullint[%d] = %d\n",
- i, vresult_ullint[i], i, expected_vresult_ullint[i]);
+ for (i = 0; i < 16; i++)
+ printf(" vresult_uchar[%d] = 0x%x, expected_vresult_uchar[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
}
src_a_llint = 678;
- src_va_llint = (vector long long int) { 0, 0x101 };
+ src_va_uchar = (vector unsigned char) { 0, 0xa6, 0x2, 0, 0, 0, 0, 0,
+ 0x0, 0x1, 0, 0, 0, 0, 0, 0 };
vresult_llint = (vector long long int) { 0, 0 };
/* Byte index 7 will over write least significant byte of element 0 */
- expected_vresult_llint = (vector long long int) { 678*256, 0x100 };
+ expected_vresult_uchar
+ = (vector unsigned char) { 0x0, 0xa6, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
- vresult_uchar = vec_replace_unaligned (src_va_llint, src_a_llint, 7);
- vresult_llint = (vector signed long long) vresult_uchar;
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_llint, 7);
- if (!vec_all_eq (vresult_llint, expected_vresult_llint)) {
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_llint, src_va_llint, "
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_llint, "
"index)\n");
- for(i = 0; i < 2; i++)
- printf(" vresult_llint[%d] = %d, expected_vresult_llint[%d] = %d\n",
- i, vresult_llint[i], i, expected_vresult_llint[i]);
+ for (i = 0; i < 16; i++)
+ printf(" vresult_uchar[%d] = 0x%x, expected_vresult_uchar[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
}
src_a_double = 678.0;
- src_va_double = (vector double) { 0.0, 50.0 };
- vresult_double = (vector double) { 0.0, 0.0 };
- expected_vresult_double = (vector double) { 0.0, 678.0 };
+ src_va_uchar = (vector unsigned char) { 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0 };
+ expected_vresult_uchar
+ = (vector unsigned char) { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x30, 0x85, 0x40 };
- vresult_uchar = vec_replace_unaligned (src_va_double, src_a_double, 0);
- vresult_double = (vector double) vresult_uchar;
+ vresult_uchar = vec_replace_unaligned (src_va_uchar, src_a_double, 0);
- if (!vec_all_eq (vresult_double, expected_vresult_double)) {
+ if (!vec_all_eq (vresult_uchar, expected_vresult_uchar)) {
#if DEBUG
- printf("ERROR, vec_replace_unaligned (src_vb_double, src_va_double, "
- "index)\n");
- for(i = 0; i < 2; i++)
- printf(" vresult_double[%d] = %f, expected_vresult_double[%d] = %f\n",
- i, vresult_double[i], i, expected_vresult_double[i]);
+ printf("ERROR, vec_replace_unaligned (src_va_uchar, src_a_double, "
+ "0)\n");
+ for (i = 0; i < 16; i++)
+ printf(" vresult_uchar[%d] = 0x%x, expected_vresult_uchar[%d] = 0x%x\n",
+ i, vresult_uchar[i], i, expected_vresult_uchar[i]);
#else
abort();
#endif
}
-
+
return 0;
}
/* { dg-final { scan-assembler-times {\mvinsw\M} 6 } } */
/* { dg-final { scan-assembler-times {\mvinsd\M} 6 } } */
-
-
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_2.c b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_2.c
new file mode 100644
index 0000000..153d1e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable_2.c
@@ -0,0 +1,49 @@
+/* { dg-do run { target { power10_hw } } } */
+/* { dg-options "-mdejagnu-cpu=power10 -save-temps" } */
+
+#include <altivec.h>
+
+#define DEBUG 0
+
+#if DEBUG
+#include <stdio.h>
+#endif
+
+extern void abort (void);
+
+int
+main (int argc, char *argv [])
+{
+ int i;
+ vector unsigned long long int vresult_ullint;
+ vector unsigned long long int expected_vresult_ullint;
+ vector unsigned long long int src_va_ullint;
+ unsigned int long long src_a_ullint;
+
+ /* Replace doubleword size chunk specified as a constant that can be
+ represented by an int. Should generate a vinsd instruction. Note, this
+ test requires command line option -flax-vector-conversions. */
+ src_a_ullint = 456;
+ src_va_ullint = (vector unsigned long long int) { 0, 11 };
+ vresult_ullint = (vector unsigned long long int) { 0, 2 };
+ expected_vresult_ullint = (vector unsigned long long int) { 0, 456 };
+
+ vresult_ullint = (vector unsigned long long int)
+ vec_replace_unaligned ((vector unsigned char)src_va_ullint,
+ src_a_ullint, 0);
+
+ if (!vec_all_eq (vresult_ullint, expected_vresult_ullint)) {
+#if DEBUG
+ printf("ERROR, vec_replace_unaligned ((vector unsigned char)src_vb_ullint, src_a_ullint, index)\n");
+ for (i = 0; i < 2; i++)
+ printf(" vresult_ullint[%d] = %d, expected_vresult_ullint[%d] = %d\n",
+ i, vresult_ullint[i], i, expected_vresult_ullint[i]);
+#else
+ abort();
+#endif
+ }
+
+ return 0;
+}
+
+/* { dg-final { scan-assembler-times {\mvinsd\M} 1 } } */