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| author | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2014-01-29 15:42:37 +0000 |
|---|---|---|
| committer | Marcus Shawcroft <mshawcroft@gcc.gnu.org> | 2014-01-29 15:42:37 +0000 |
| commit | aef66c94a0acddb4377e760b3a2064b3ad280257 (patch) | |
| tree | 3a3be15627c5629546398262954c1932e48c2000 /gcc | |
| parent | 0d66cee51db569b3b4c4de2cb4b2292f9df4eaa5 (diff) | |
| download | gcc-aef66c94a0acddb4377e760b3a2064b3ad280257.zip gcc-aef66c94a0acddb4377e760b3a2064b3ad280257.tar.gz gcc-aef66c94a0acddb4377e760b3a2064b3ad280257.tar.bz2 | |
[AArch64] Fix various white space issues.
2014-01-29 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/aarch64.c (aarch64_expand_mov_immediate)
(aarch64_legitimate_address_p, aarch64_class_max_nregs): Adjust
whitespace.
From-SVN: r207258
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 6 |
2 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c81432d..737f5b1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-01-29 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_mov_immediate) + (aarch64_legitimate_address_p, aarch64_class_max_nregs): Adjust + whitespace. + 2014-01-29 Richard Biener <rguenther@suse.de> PR tree-optimization/58742 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 57b6645..d3c5cbc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -916,7 +916,7 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm) if (offset != const0_rtx && targetm.cannot_force_const_mem (mode, imm)) { - gcc_assert(can_create_pseudo_p ()); + gcc_assert (can_create_pseudo_p ()); base = aarch64_force_temporary (mode, dest, base); base = aarch64_add_offset (mode, NULL, base, INTVAL (offset)); aarch64_emit_move (dest, base); @@ -3249,7 +3249,7 @@ aarch64_legitimate_address_hook_p (enum machine_mode mode, rtx x, bool strict_p) pair operation. */ bool aarch64_legitimate_address_p (enum machine_mode mode, rtx x, - RTX_CODE outer_code, bool strict_p) + RTX_CODE outer_code, bool strict_p) { struct aarch64_address_info addr; @@ -4256,7 +4256,7 @@ aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) case FP_LO_REGS: return aarch64_vector_mode_p (mode) ? (GET_MODE_SIZE (mode) + 15) / 16 : - (GET_MODE_SIZE (mode) + 7) / 8; + (GET_MODE_SIZE (mode) + 7) / 8; case STACK_REG: return 1; |