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author | Wilco Dijkstra <wdijkstr@arm.com> | 2015-09-20 16:34:44 +0000 |
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committer | Jiong Wang <jiwang@gcc.gnu.org> | 2015-09-20 16:34:44 +0000 |
commit | a64c73a2f00ab4ab6a7485b34626d07ea2b2d519 (patch) | |
tree | 23aac25dd7cebb695bd64a8b8947c7507294268f /gcc | |
parent | e4bdea2f3092425ace1a883d9c496786fdef5719 (diff) | |
download | gcc-a64c73a2f00ab4ab6a7485b34626d07ea2b2d519.zip gcc-a64c73a2f00ab4ab6a7485b34626d07ea2b2d519.tar.gz gcc-a64c73a2f00ab4ab6a7485b34626d07ea2b2d519.tar.bz2 |
[AArch64][1/5] Reimplement aarch64_bitmask_imm
2015-09-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_bitmask_imm): Reimplement using
faster algorithm.
From-SVN: r227946
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 62 |
2 files changed, 58 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8bb16d0..9810ec6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-09-20 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.c (aarch64_bitmask_imm): Reimplement using + faster algorithm. + 2015-09-20 Jeff Law <law@redhat.com> PR tree-optimization/47679 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index bbac271..2e7b9ec 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -3405,19 +3405,63 @@ aarch64_movw_imm (HOST_WIDE_INT val, machine_mode mode) || (val & (((HOST_WIDE_INT) 0xffff) << 16)) == val); } +/* Multipliers for repeating bitmasks of width 32, 16, 8, 4, and 2. */ + +static const unsigned HOST_WIDE_INT bitmask_imm_mul[] = + { + 0x0000000100000001ull, + 0x0001000100010001ull, + 0x0101010101010101ull, + 0x1111111111111111ull, + 0x5555555555555555ull, + }; + /* Return true if val is a valid bitmask immediate. */ + bool -aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode mode) +aarch64_bitmask_imm (HOST_WIDE_INT val_in, machine_mode mode) { - if (GET_MODE_SIZE (mode) < 8) - { - /* Replicate bit pattern. */ - val &= (HOST_WIDE_INT) 0xffffffff; - val |= val << 32; - } - return bsearch (&val, aarch64_bitmasks, AARCH64_NUM_BITMASKS, - sizeof (aarch64_bitmasks[0]), aarch64_bitmasks_cmp) != NULL; + unsigned HOST_WIDE_INT val, tmp, mask, first_one, next_one; + int bits; + + /* Check for a single sequence of one bits and return quickly if so. + The special cases of all ones and all zeroes returns false. */ + val = (unsigned HOST_WIDE_INT) val_in; + tmp = val + (val & -val); + + if (tmp == (tmp & -tmp)) + return (val + 1) > 1; + + /* Replicate 32-bit immediates so we can treat them as 64-bit. */ + if (mode == SImode) + val = (val << 32) | (val & 0xffffffff); + + /* Invert if the immediate doesn't start with a zero bit - this means we + only need to search for sequences of one bits. */ + if (val & 1) + val = ~val; + + /* Find the first set bit and set tmp to val with the first sequence of one + bits removed. Return success if there is a single sequence of ones. */ + first_one = val & -val; + tmp = val & (val + first_one); + + if (tmp == 0) + return true; + + /* Find the next set bit and compute the difference in bit position. */ + next_one = tmp & -tmp; + bits = clz_hwi (first_one) - clz_hwi (next_one); + mask = val ^ tmp; + + /* Check the bit position difference is a power of 2, and that the first + sequence of one bits fits within 'bits' bits. */ + if ((mask >> bits) != 0 || bits != (bits & -bits)) + return false; + + /* Check the sequence of one bits is repeated 64/bits times. */ + return val == mask * bitmask_imm_mul[__builtin_clz (bits) - 26]; } |