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author | Kazu Hirata <kazu@cs.umass.edu> | 2003-12-31 00:25:51 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2003-12-31 00:25:51 +0000 |
commit | a3c9585fe7c060a2a0a90615fca315b914ce1ddb (patch) | |
tree | 56279f5300e43f32544f21f76eec9708fc0952d6 /gcc | |
parent | c0a112d17e43bc13d4e48f4e3afd087aa1d0ada7 (diff) | |
download | gcc-a3c9585fe7c060a2a0a90615fca315b914ce1ddb.zip gcc-a3c9585fe7c060a2a0a90615fca315b914ce1ddb.tar.gz gcc-a3c9585fe7c060a2a0a90615fca315b914ce1ddb.tar.bz2 |
aix.h: Fix comment formatting.
* config/rs6000/aix.h: Fix comment formatting.
* config/rs6000/rs6000-modes.def: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.h: Likewise.
* config/rs6000/rs6000.md: Likewise.
From-SVN: r75252
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/aix.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000-modes.def | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 32 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 2 |
6 files changed, 28 insertions, 20 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0259b181..bdfef52 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2003-12-30 Kazu Hirata <kazu@cs.umass.edu> + * config/rs6000/aix.h: Fix comment formatting. + * config/rs6000/rs6000-modes.def: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/rs6000/rs6000.h: Likewise. + * config/rs6000/rs6000.md: Likewise. + +2003-12-30 Kazu Hirata <kazu@cs.umass.edu> + * config/i386/i386-protos.h: Remove prototype for const_int_1_operand. * config/i386/i386.c (const_int_1_operand): Remove. diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h index e6d8e1f..3318621 100644 --- a/gcc/config/rs6000/aix.h +++ b/gcc/config/rs6000/aix.h @@ -128,7 +128,7 @@ #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc" -/* This now supports a natural alignment mode. */ +/* This now supports a natural alignment mode. */ /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */ #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ (TARGET_ALIGN_NATURAL ? (COMPUTED) : \ diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index 1b6aa48..6f17f1a 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -20,7 +20,7 @@ MA 02111-1307, USA. */ /* 128-bit floating point. ABI_V4 uses IEEE quad, AIX/Darwin - adjust this in rs6000_override_options. */ + adjust this in rs6000_override_options. */ FLOAT_MODE (TF, 16, ieee_quad_format); /* PSImode is used for the XER register. The XER register diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4dc83c1..f8037c0 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -239,8 +239,8 @@ static int rs6000_sr_alias_set; int rs6000_default_long_calls; const char *rs6000_longcall_switch; -/* Control alignment for fields within structures. */ -/* String from -malign-XXXXX. */ +/* Control alignment for fields within structures. */ +/* String from -malign-XXXXX. */ const char *rs6000_alignment_string; int rs6000_alignment_flags; @@ -2129,7 +2129,7 @@ and64_operand (rtx op, enum machine_mode mode) int and64_2_operand (rtx op, enum machine_mode mode) { - if (fixed_regs[CR0_REGNO]) /* CR0 not available, don't do andi./andis. */ + if (fixed_regs[CR0_REGNO]) /* CR0 not available, don't do andi./andis. */ return gpc_reg_operand (op, mode) || mask64_2_operand (op, mode); return logical_operand (op, mode) || mask64_2_operand (op, mode); @@ -4040,7 +4040,7 @@ rs6000_mixed_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, else if (align_words + RS6000_ARG_SIZE (mode, type) > GP_ARG_NUM_REG) /* If this is partially on the stack, then we only - include the portion actually in registers here. */ + include the portion actually in registers here. */ return gen_rtx_PARALLEL (DFmode, gen_rtvec (2, gen_rtx_EXPR_LIST (VOIDmode, @@ -4696,7 +4696,7 @@ rs6000_va_arg (tree valist, tree type) sav_scale = 4; } - /* Pull the value out of the saved registers ... */ + /* Pull the value out of the saved registers.... */ lab_false = gen_label_rtx (); lab_over = gen_label_rtx (); @@ -9734,7 +9734,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx insn) s += sprintf (s, "{b%s|b%s%s} ", ccode, ccode, pred); /* We need to escape any '%' characters in the reg_names string. - Assume they'd only be the first character... */ + Assume they'd only be the first character.... */ if (reg_names[cc_regno + CR0_REGNO][0] == '%') *s++ = '%'; s += sprintf (s, "%s", reg_names[cc_regno + CR0_REGNO]); @@ -9767,7 +9767,7 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) enum machine_mode result_mode = GET_MODE (dest); rtx temp; - /* These modes should always match. */ + /* These modes should always match. */ if (GET_MODE (op1) != compare_mode /* In the isel case however, we can use a compare immediate, so op1 may be a small constant. */ @@ -9779,7 +9779,7 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) return 0; /* First, work out if the hardware can do this at all, or - if it's too slow... */ + if it's too slow.... */ if (! rs6000_compare_fp_p) { if (TARGET_ISEL) @@ -10892,7 +10892,7 @@ rs6000_ra_ever_killed (void) /* regs_ever_live has LR marked as used if any sibcalls are present, but this should not force saving and restoring in the pro/epilogue. Likewise, reg_set_between_p thinks a sibcall - clobbers LR, so that is inappropriate. */ + clobbers LR, so that is inappropriate. */ /* Also, the prologue can generate a store into LR that doesn't really count, like this: @@ -11966,7 +11966,7 @@ rs6000_output_function_prologue (FILE *file, rs6000_emit_prologue (); emit_note (NOTE_INSN_DELETED); - /* Expand INSN_ADDRESSES so final() doesn't crash. */ + /* Expand INSN_ADDRESSES so final() doesn't crash. */ { rtx insn; unsigned addr = 0; @@ -12398,7 +12398,7 @@ rs6000_output_function_epilogue (FILE *file, rs6000_emit_epilogue (FALSE); emit_note (NOTE_INSN_DELETED); - /* Expand INSN_ADDRESSES so final() doesn't crash. */ + /* Expand INSN_ADDRESSES so final() doesn't crash. */ { rtx insn; unsigned addr = 0; @@ -13481,7 +13481,7 @@ output_function_profiler (FILE *file, int labelno) case ABI_DARWIN: if (!TARGET_PROFILE_KERNEL) { - /* Don't do anything, done in output_profile_hook (). */ + /* Don't do anything, done in output_profile_hook (). */ } else { @@ -13691,7 +13691,7 @@ is_cracked_insn (rtx insn) } /* The function returns true if INSN can be issued only from - the branch slot. */ + the branch slot. */ static bool is_branch_slot_insn (rtx insn) @@ -14965,7 +14965,7 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, if (GET_CODE (XEXP (orig, 0)) == PLUS) { /* Use a different reg for the intermediate value, as - it will be marked UNCHANGING. */ + it will be marked UNCHANGING. */ rtx reg_temp = no_new_pseudos ? reg : gen_reg_rtx (Pmode); base = @@ -15544,7 +15544,7 @@ rs6000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, return true; case MEM: - /* MEM should be slightly more expensive than (plus (reg) (const)) */ + /* MEM should be slightly more expensive than (plus (reg) (const)). */ *total = 5; return true; @@ -15571,7 +15571,7 @@ rs6000_register_move_cost (enum machine_mode mode, return (rs6000_memory_move_cost (mode, from, 0) + rs6000_memory_move_cost (mode, GENERAL_REGS, 0)); -/* It's more expensive to move CR_REGS than CR0_REGS because of the shift...*/ +/* It's more expensive to move CR_REGS than CR0_REGS because of the shift.... */ else if (from == CR_REGS) return 4; diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 761873d..3b14ce6 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2231,7 +2231,7 @@ do { \ between pointers and any other objects of this machine mode. */ #define Pmode (TARGET_32BIT ? SImode : DImode) -/* Supply definition of STACK_SIZE_MODE for allocate_dynamic_stack_space. */ +/* Supply definition of STACK_SIZE_MODE for allocate_dynamic_stack_space. */ #define STACK_SIZE_MODE (TARGET_32BIT ? SImode : DImode) /* Mode of a function address in a call instruction (for indexing purposes). diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 3ab0465..602eabaf 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7635,7 +7635,7 @@ operands2[1] = operands[1]; operands2[2] = operands[2]; if (TARGET_POWERPC64 && TARGET_32BIT) - /* Note, old assemblers didn't support relocation here. */ + /* Note, old assemblers didn't support relocation here. */ return \"ld %0,lo16(%2)(%1)\"; else { |