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authorGCC Administrator <gccadmin@gcc.gnu.org>2021-09-11 00:16:27 +0000
committerGCC Administrator <gccadmin@gcc.gnu.org>2021-09-11 00:16:27 +0000
commita26206ec7b8f8c60747c25d009ea7f9b94184215 (patch)
treeab88ff4003eb9805ebab205703f30688bd81caa4 /gcc
parent332a9f7636ca2a49be3a6ee9c610c5dba9e7e2da (diff)
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Daily bump.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog277
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/c-family/ChangeLog7
-rw-r--r--gcc/c/ChangeLog13
-rw-r--r--gcc/cp/ChangeLog6
-rw-r--r--gcc/jit/ChangeLog8
-rw-r--r--gcc/testsuite/ChangeLog139
7 files changed, 451 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 60fd1be..6bdd137 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,280 @@
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ Revert:
+ 2021-09-01 liuhongt <hongtao.liu@intel.com>
+
+ * emit-rtl.c (validate_subreg): Get rid of all float-int
+ special cases.
+
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-core.h (enum omp_memory_order): Add OMP_MEMORY_ORDER_MASK,
+ OMP_FAIL_MEMORY_ORDER_UNSPECIFIED, OMP_FAIL_MEMORY_ORDER_RELAXED,
+ OMP_FAIL_MEMORY_ORDER_ACQUIRE, OMP_FAIL_MEMORY_ORDER_RELEASE,
+ OMP_FAIL_MEMORY_ORDER_ACQ_REL, OMP_FAIL_MEMORY_ORDER_SEQ_CST and
+ OMP_FAIL_MEMORY_ORDER_MASK enumerators.
+ (OMP_FAIL_MEMORY_ORDER_SHIFT): Define.
+ * gimple-pretty-print.c (dump_gimple_omp_atomic_load,
+ dump_gimple_omp_atomic_store): Print [weak] for weak atomic
+ load/store.
+ * gimple.h (enum gf_mask): Change GF_OMP_ATOMIC_MEMORY_ORDER
+ to 6-bit mask, adjust GF_OMP_ATOMIC_NEED_VALUE value and add
+ GF_OMP_ATOMIC_WEAK.
+ (gimple_omp_atomic_weak_p, gimple_omp_atomic_set_weak): New inline
+ functions.
+ * tree.h (OMP_ATOMIC_WEAK): Define.
+ * tree-pretty-print.c (dump_omp_atomic_memory_order): Adjust for
+ fail memory order being encoded in the same enum and also print
+ fail clause if present.
+ (dump_generic_node): Print weak clause if OMP_ATOMIC_WEAK.
+ * gimplify.c (goa_stabilize_expr): Add target_expr and rhs arguments,
+ handle pre_p == NULL case as a test mode that only returns value
+ but doesn't change gimplify nor change anything otherwise, adjust
+ recursive calls, add MODIFY_EXPR, ADDR_EXPR, COND_EXPR, TARGET_EXPR
+ and CALL_EXPR handling, adjust COMPOUND_EXPR handling for
+ __builtin_clear_padding calls, for !rhs gimplify as lvalue rather
+ than rvalue.
+ (gimplify_omp_atomic): Adjust goa_stabilize_expr caller. Handle
+ COND_EXPR rhs. Set weak flag on gimple load/store for
+ OMP_ATOMIC_WEAK.
+ * omp-expand.c (omp_memory_order_to_fail_memmodel): New function.
+ (omp_memory_order_to_memmodel): Adjust for fail clause encoded
+ in the same enum.
+ (expand_omp_atomic_cas): New function.
+ (expand_omp_atomic_pipeline): Use omp_memory_order_to_fail_memmodel
+ function.
+ (expand_omp_atomic): Attempt to optimize atomic compare and exchange
+ using expand_omp_atomic_cas.
+
+2021-09-10 Aldy Hernandez <aldyh@redhat.com>
+ Michael Matz <matz@suse.de>
+
+ * tree-pass.h (PROP_loop_opts_done): New.
+ * gimple-range-path.cc (path_range_query::internal_range_of_expr):
+ Intersect with global range.
+ * tree-ssa-loop.c (tree_ssa_loop_done): Set PROP_loop_opts_done.
+ * tree-ssa-threadbackward.c
+ (back_threader_profitability::profitable_path_p): Disable
+ threading through latches until after loop optimizations have run.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * doc/invoke.texi: Document BPF -mcpu, -mjmpext, -mjmp32 and -malu32
+ options.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf-opts.h (bpf_isa_version): New enum.
+ * config/bpf/bpf-protos.h (bpf_expand_cbranch): New.
+ * config/bpf/bpf.c (bpf_option_override): Handle -mcpu option.
+ (bpf_expand_cbranch): New function.
+ * config/bpf/bpf.md (AM mode iterator): Conditionalize support for SI
+ mode.
+ (zero_extendsidi2): Only use mov32 instruction if it is available.
+ (SIM mode iterator): Conditionalize support for SI mode.
+ (JM mode iterator): New.
+ (cbranchdi4): Update name, use new JM iterator. Use bpf_expand_cbranch.
+ (*branch_on_di): Update name, use new JM iterator.
+ * config/bpf/bpf.opt: (mjmpext): New option.
+ (malu32): Likewise.
+ (mjmp32): Likewise.
+ (mcpu): Likewise.
+ (bpf_isa): New enum.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * config/bpf/bpf.md (zero_extendhidi2): Add new output template
+ for register-to-register extensions.
+ (zero_extendqidi2): Likewise.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102273
+ * internal-fn.c (expand_DEFERRED_INIT): Always expand non-SSA vars.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102269
+ * gimplify.c (is_var_need_auto_init): Empty types do not need
+ initialization.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ * configure.ac (--with-stabs): Remove.
+ * configure: Regenerate.
+ * doc/install.texi: Remove --with-stabs documentation.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_cmp_ph_mask):
+ New intrinsic.
+ (_mm512_mask_cmp_ph_mask): Likewise.
+ (_mm512_cmp_round_ph_mask): Likewise.
+ (_mm512_mask_cmp_round_ph_mask): Likewise.
+ (_mm_cmp_sh_mask): Likewise.
+ (_mm_mask_cmp_sh_mask): Likewise.
+ (_mm_cmp_round_sh_mask): Likewise.
+ (_mm_mask_cmp_round_sh_mask): Likewise.
+ (_mm_comieq_sh): Likewise.
+ (_mm_comilt_sh): Likewise.
+ (_mm_comile_sh): Likewise.
+ (_mm_comigt_sh): Likewise.
+ (_mm_comige_sh): Likewise.
+ (_mm_comineq_sh): Likewise.
+ (_mm_ucomieq_sh): Likewise.
+ (_mm_ucomilt_sh): Likewise.
+ (_mm_ucomile_sh): Likewise.
+ (_mm_ucomigt_sh): Likewise.
+ (_mm_ucomige_sh): Likewise.
+ (_mm_ucomineq_sh): Likewise.
+ (_mm_comi_round_sh): Likewise.
+ (_mm_comi_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_cmp_ph_mask): New intrinsic.
+ (_mm_mask_cmp_ph_mask): Likewise.
+ (_mm256_cmp_ph_mask): Likewise.
+ (_mm256_mask_cmp_ph_mask): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ (ix86_expand_round_builtin): Ditto.
+ * config/i386/i386.md (ssevecmode): Add HF mode.
+ (MODEFH): New mode iterator.
+ * config/i386/sse.md
+ (V48H_AVX512VL): New mode iterator to support HF vector modes.
+ Ajdust corresponding description.
+ (ssecmpintprefix): New.
+ (VI12_AVX512VL): Adjust to support HF vector modes.
+ (cmp_imm_predicate): Likewise.
+ (<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>):
+ Likewise.
+ (avx512f_vmcmp<mode>3<round_saeonly_name>): Likewise.
+ (avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Likewise.
+ (<sse>_<unord>comi<round_saeonly_name>): Likewise.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h: (_mm512_max_ph): New intrinsic.
+ (_mm512_mask_max_ph): Likewise.
+ (_mm512_maskz_max_ph): Likewise.
+ (_mm512_min_ph): Likewise.
+ (_mm512_mask_min_ph): Likewise.
+ (_mm512_maskz_min_ph): Likewise.
+ (_mm512_max_round_ph): Likewise.
+ (_mm512_mask_max_round_ph): Likewise.
+ (_mm512_maskz_max_round_ph): Likewise.
+ (_mm512_min_round_ph): Likewise.
+ (_mm512_mask_min_round_ph): Likewise.
+ (_mm512_maskz_min_round_ph): Likewise.
+ (_mm_max_sh): Likewise.
+ (_mm_mask_max_sh): Likewise.
+ (_mm_maskz_max_sh): Likewise.
+ (_mm_min_sh): Likewise.
+ (_mm_mask_min_sh): Likewise.
+ (_mm_maskz_min_sh): Likewise.
+ (_mm_max_round_sh): Likewise.
+ (_mm_mask_max_round_sh): Likewise.
+ (_mm_maskz_max_round_sh): Likewise.
+ (_mm_min_round_sh): Likewise.
+ (_mm_mask_min_round_sh): Likewise.
+ (_mm_maskz_min_round_sh): Likewise.
+ * config/i386/avx512fp16vlintrin.h (_mm_max_ph): New intrinsic.
+ (_mm256_max_ph): Likewise.
+ (_mm_mask_max_ph): Likewise.
+ (_mm256_mask_max_ph): Likewise.
+ (_mm_maskz_max_ph): Likewise.
+ (_mm256_maskz_max_ph): Likewise.
+ (_mm_min_ph): Likewise.
+ (_mm256_min_ph): Likewise.
+ (_mm_mask_min_ph): Likewise.
+ (_mm256_mask_min_ph): Likewise.
+ (_mm_maskz_min_ph): Likewise.
+ (_mm256_maskz_min_ph): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_args_builtin): Handle new builtin types.
+ * config/i386/sse.md
+ (<code><mode>3<mask_name><round_saeonly_name>): Adjust to
+ support HF vector modes.
+ (*<code><mode>3<mask_name><round_saeonly_name>): Likewise.
+ (ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>):
+ Likewise.
+ (<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
+ Likewise.
+ * config/i386/subst.md (round_saeonly_mode512bit_condition):
+ Adjust for HF vector modes.
+
+2021-09-10 Liu, Hongtao <hongtao.liu@intel.com>
+
+ * config/i386/avx512fp16intrin.h (_mm_add_sh): New intrinsic.
+ (_mm_mask_add_sh): Likewise.
+ (_mm_maskz_add_sh): Likewise.
+ (_mm_sub_sh): Likewise.
+ (_mm_mask_sub_sh): Likewise.
+ (_mm_maskz_sub_sh): Likewise.
+ (_mm_mul_sh): Likewise.
+ (_mm_mask_mul_sh): Likewise.
+ (_mm_maskz_mul_sh): Likewise.
+ (_mm_div_sh): Likewise.
+ (_mm_mask_div_sh): Likewise.
+ (_mm_maskz_div_sh): Likewise.
+ (_mm_add_round_sh): Likewise.
+ (_mm_mask_add_round_sh): Likewise.
+ (_mm_maskz_add_round_sh): Likewise.
+ (_mm_sub_round_sh): Likewise.
+ (_mm_mask_sub_round_sh): Likewise.
+ (_mm_maskz_sub_round_sh): Likewise.
+ (_mm_mul_round_sh): Likewise.
+ (_mm_mask_mul_round_sh): Likewise.
+ (_mm_maskz_mul_round_sh): Likewise.
+ (_mm_div_round_sh): Likewise.
+ (_mm_mask_div_round_sh): Likewise.
+ (_mm_maskz_div_round_sh): Likewise.
+ * config/i386/i386-builtin-types.def: Add corresponding builtin types.
+ * config/i386/i386-builtin.def: Add corresponding new builtins.
+ * config/i386/i386-expand.c
+ (ix86_expand_round_builtin): Handle new builtins.
+ * config/i386/sse.md (VF_128): Change description.
+ (<sse>_vm<plusminus_insn><mode>3<mask_scalar_name><round_scalar_name>):
+ Adjust to support HF vector modes.
+ (<sse>_vm<multdiv_mnemonic><mode>3<mask_scalar_name><round_scalar_name>):
+ Likewise.
+
+2021-09-10 H.J. Lu <hjl.tools@gmail.com>
+
+ * config/i386/i386-expand.c
+ (ix86_avx256_split_vector_move_misalign): Handle V16HF mode.
+ * config/i386/i386.c
+ (ix86_preferred_simd_mode): Handle HF mode.
+ * config/i386/sse.md (V_256H): New mode iterator.
+ (avx_vextractf128<mode>): Use it.
+ (VEC_INIT_MODE): Align vector HFmode condition to vector
+ HImodes since there're no real HF instruction used.
+ (VEC_INIT_HALF_MODE): Ditto.
+ (VIHF): Ditto.
+ (VIHF_AVX512BW): Ditto.
+ (*vec_extracthf): Ditto.
+ (VEC_EXTRACT_MODE): Ditto.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR target/102255
+ * config/dbx.h: Remove.
+ * config/dbxcoff.h: Do not define PREFERRED_DEBUGGING_TYPE.
+ * config/lynx.h: Likewise.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386-expand.c (ix86_expand_copysign): Expand
+ right into ANDNOT + AND + IOR, using paradoxical subregs.
+ (ix86_split_copysign_const): Remove.
+ (ix86_split_copysign_var): Ditto.
+ * config/i386/i386-protos.h (ix86_split_copysign_const): Dotto.
+ (ix86_split_copysign_var): Ditto.
+ * config/i386/i386.md (@copysign<mode>3_const): Ditto.
+ (@copysign<mode>3_var): Ditto.
+
2021-09-09 qing zhao <qing.zhao@oracle.com>
* builtins.c (expand_builtin_memset): Make external visible.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 7706119..6edcec5 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210910
+20210911
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index c39dfe3..684d7d0 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,10 @@
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * c-common.h (c_finish_omp_atomic): Add r and weak arguments.
+ * c-omp.c: Include gimple-fold.h.
+ (c_finish_omp_atomic): Add r and weak arguments. Add support for
+ OpenMP 5.1 atomics.
+
2021-09-09 qing zhao <qing.zhao@oracle.com>
* c-attribs.c (handle_uninitialized_attribute): New function.
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 9deeb0e..28fe7bc 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,16 @@
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * c-parser.c (c_parser_conditional_expression): If omp_atomic_lhs and
+ cond.value is >, < or == with omp_atomic_lhs as one of the operands,
+ don't call build_conditional_expr, instead build a COND_EXPR directly.
+ (c_parser_binary_expression): Avoid calling parser_build_binary_op
+ if omp_atomic_lhs even in more cases for >, < or ==.
+ (c_parser_omp_atomic): Update function comment for OpenMP 5.1 atomics,
+ parse OpenMP 5.1 atomics and fail, compare and weak clauses, allow
+ acq_rel on atomic read/write and acq_rel/acquire clauses on update.
+ * c-typeck.c (build_binary_op): For flag_openmp only handle
+ MIN_EXPR/MAX_EXPR.
+
2021-09-07 Marcel Vollweiler <marcel@codesourcery.com>
* c-parser.c (c_parser_omp_flush): Parse 'seq_cst' clause on 'flush'
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 84b9b97..8d1ec5d 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,9 @@
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * parser.c (cp_parser_omp_atomic): Allow acq_rel on atomic read/write
+ and acq_rel/acquire clauses on update.
+ * semantics.c (finish_omp_atomic): Adjust c_finish_omp_atomic caller.
+
2021-09-08 Richard Biener <rguenther@suse.de>
PR c++/102228
diff --git a/gcc/jit/ChangeLog b/gcc/jit/ChangeLog
index c7379f3..334fd39 100644
--- a/gcc/jit/ChangeLog
+++ b/gcc/jit/ChangeLog
@@ -1,3 +1,11 @@
+2021-09-10 Petter Tomner <tomner@kth.se>
+
+ * jit-playback.c: Moved global var processing to after loc handling.
+ Setting TYPE_NAME for fundamental types.
+ Using common functions for finalizing globals.
+ * jit-playback.h: New method init_types().
+ Changed get_tree_node_for_type() to method.
+
2021-08-19 Iain Sandoe <iain@sandoe.co.uk>
* docs/examples/tut04-toyvm/toyvm.c: Include jit-dejagnu.h.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1ca45f8..896582a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,142 @@
+2021-09-10 Petter Tomner <tomner@kth.se>
+
+ * jit.dg/test-error-array-bounds.c: Array is not unsigned
+ * jit.dg/jit.exp: Helper function
+ * jit.dg/test-debuginfo.c: New testcase
+
+2021-09-10 Jakub Jelinek <jakub@redhat.com>
+
+ * c-c++-common/gomp/atomic-17.c (foo): Add tests for atomic read,
+ write or update with acq_rel clause and atomic update with acquire clause.
+ * c-c++-common/gomp/atomic-18.c (foo): Adjust expected diagnostics
+ wording, remove tests moved to atomic-17.c.
+ * c-c++-common/gomp/atomic-21.c: Expect only 2 omp atomic release and
+ 2 omp atomic acq_rel directives instead of 4 omp atomic release.
+ * c-c++-common/gomp/atomic-25.c: New test.
+ * c-c++-common/gomp/atomic-26.c: New test.
+ * c-c++-common/gomp/atomic-27.c: New test.
+ * c-c++-common/gomp/atomic-28.c: New test.
+ * c-c++-common/gomp/atomic-29.c: New test.
+ * c-c++-common/gomp/atomic-30.c: New test.
+ * c-c++-common/goacc-gomp/atomic.c: Expect 1 omp atomic release and
+ 1 omp atomic_acq_rel instead of 2 omp atomic release directives.
+ * gcc.dg/gomp/atomic-5.c: Adjust expected error diagnostic wording.
+ * g++.dg/gomp/atomic-18.C:Expect 4 omp atomic release and
+ 1 omp atomic_acq_rel instead of 5 omp atomic release directives.
+
+2021-09-10 Aldy Hernandez <aldyh@redhat.com>
+ Michael Matz <matz@suse.de>
+
+ * gcc.dg/tree-ssa/ssa-dom-thread-2b.c: Adjust for disabling of
+ threading through latches.
+ * gcc.dg/tree-ssa/ssa-dom-thread-6.c: Same.
+ * gcc.dg/tree-ssa/ssa-dom-thread-7.c: Same.
+
+2021-09-10 David Faust <david.faust@oracle.com>
+
+ * gcc.target/bpf/alu-1.c: New test.
+ * gcc.target/bpf/jmp-1.c: New test.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102273
+ * gcc.dg/pr102273.c: New testcase.
+
+2021-09-10 Thomas Schwinge <thomas@codesourcery.com>
+
+ * c-c++-common/auto-init-padding-2.c: Fix 'dg-do run' syntax.
+ * c-c++-common/auto-init-padding-3.c: Likewise.
+
+2021-09-10 Richard Biener <rguenther@suse.de>
+
+ PR middle-end/102269
+ * gcc.dg/pr102269.c: New testcase.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512fp16-helper.h
+ (check_results_mask): New check_function.
+ * gcc.target/i386/avx512fp16-vcmpph-1a.c: New test.
+ * gcc.target/i386/avx512fp16-vcmpph-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vcmpsh-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vcmpsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vcomish-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vcomish-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vcomish-1c.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vcmpph-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vcmpph-1b.c: Ditto.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx-1.c: Add test for new builtins.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+ * gcc.target/i386/sse-14.c: Add test for new intrinsics.
+ * gcc.target/i386/sse-22.c: Ditto.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512fp16-vmaxph-1a.c: New test.
+ * gcc.target/i386/avx512fp16-vmaxph-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vmaxsh-1.c: Ditto.
+ * gcc.target/i386/avx512fp16-vmaxsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vminph-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vminph-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vminsh-1.c: Ditto.
+ * gcc.target/i386/avx512fp16-vminsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vmaxph-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vmaxph-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vminph-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16vl-vminph-1b.c: Ditto.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx-1.c: Add test for new builtins.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+ * gcc.target/i386/sse-14.c: Add test for new intrinsics.
+ * gcc.target/i386/sse-22.c: Ditto.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512fp16-vaddsh-1a.c: New test.
+ * gcc.target/i386/avx512fp16-vaddsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vdivsh-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vdivsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vmulsh-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vmulsh-1b.c: Ditto.
+ * gcc.target/i386/avx512fp16-vsubsh-1a.c: Ditto.
+ * gcc.target/i386/avx512fp16-vsubsh-1b.c: Ditto.
+ * gcc.target/i386/pr54855-11.c: Ditto.
+
+2021-09-10 Liu, Hongtao <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx-1.c: Add test for new builtins.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+ * gcc.target/i386/sse-14.c: Add test for new intrinsics.
+ * gcc.target/i386/sse-22.c: Ditto.
+
+2021-09-10 H.J. Lu <hjl.tools@gmail.com>
+
+ * gcc.target/i386/vect-float16-1.c: New test.
+ * gcc.target/i386/vect-float16-10.c: Ditto.
+ * gcc.target/i386/vect-float16-11.c: Ditto.
+ * gcc.target/i386/vect-float16-12.c: Ditto.
+ * gcc.target/i386/vect-float16-2.c: Ditto.
+ * gcc.target/i386/vect-float16-3.c: Ditto.
+ * gcc.target/i386/vect-float16-4.c: Ditto.
+ * gcc.target/i386/vect-float16-5.c: Ditto.
+ * gcc.target/i386/vect-float16-6.c: Ditto.
+ * gcc.target/i386/vect-float16-7.c: Ditto.
+ * gcc.target/i386/vect-float16-8.c: Ditto.
+ * gcc.target/i386/vect-float16-9.c: Ditto.
+
+2021-09-10 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512dq-abs-copysign-1.c: Adjust testcase.
+ * gcc.target/i386/avx512vl-abs-copysign-1.c: Adjust testcase.
+
2021-09-09 qing zhao <qing.zhao@oracle.com>
* c-c++-common/auto-init-1.c: New test.