diff options
| author | Richard Henderson <rth@redhat.com> | 2005-05-19 14:28:02 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2005-05-19 14:28:02 -0700 |
| commit | 9f3ea395e6009dac589fa8811abf0874cc04e88d (patch) | |
| tree | ae508f196f5d4a5f601bf4f7f9d8e4a8b9ac36dd /gcc | |
| parent | 2ed61d61b50980a27c80da037594252b31430224 (diff) | |
| download | gcc-9f3ea395e6009dac589fa8811abf0874cc04e88d.zip gcc-9f3ea395e6009dac589fa8811abf0874cc04e88d.tar.gz gcc-9f3ea395e6009dac589fa8811abf0874cc04e88d.tar.bz2 | |
sse.md (mulv4si3): Use all register inputs.
* config/i386/sse.md (mulv4si3): Use all register inputs.
(mulv2di3): Likewise.
From-SVN: r99986
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
2 files changed, 9 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 81ea098..8ae7f78 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2005-05-19 Richard Henderson <rth@redhat.com> + + * config/i386/sse.md (mulv4si3): Use all register inputs. + (mulv2di3): Likewise. + 2005-05-19 Richard Guenther <rguenth@gcc.gnu.org> * tree-ssa-loop-ivopts.c (determine_base_object): Use diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5ff94ba..4d664ce 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2536,8 +2536,8 @@ (define_expand "mulv4si3" [(set (match_operand:V4SI 0 "register_operand" "") - (mult:V4SI (match_operand:V4SI 1 "nonimmediate_operand" "") - (match_operand:V4SI 2 "nonimmediate_operand" "")))] + (mult:V4SI (match_operand:V4SI 1 "register_operand" "") + (match_operand:V4SI 2 "register_operand" "")))] "TARGET_SSE2" { rtx t1, t2, t3, t4, t5, t6, thirtytwo; @@ -2582,8 +2582,8 @@ (define_expand "mulv2di3" [(set (match_operand:V2DI 0 "register_operand" "") - (mult:V2DI (match_operand:V2DI 1 "nonimmediate_operand" "") - (match_operand:V2DI 2 "nonimmediate_operand" "")))] + (mult:V2DI (match_operand:V2DI 1 "register_operand" "") + (match_operand:V2DI 2 "register_operand" "")))] "TARGET_SSE2" { rtx t1, t2, t3, t4, t5, t6, thirtytwo; |