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| author | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-11-30 15:05:59 +0800 |
|---|---|---|
| committer | Haochen Gui <guihaoc@gcc.gnu.org> | 2022-12-01 10:06:11 +0800 |
| commit | 9d68cba5eb20442f8075b8f92d1b20a00022852f (patch) | |
| tree | 7cde00fed65fd544324c571144f443bb03f34445 /gcc | |
| parent | 6eea85a95eecce38d194408fa4ce139b8bce1b28 (diff) | |
| download | gcc-9d68cba5eb20442f8075b8f92d1b20a00022852f.zip gcc-9d68cba5eb20442f8075b8f92d1b20a00022852f.tar.gz gcc-9d68cba5eb20442f8075b8f92d1b20a00022852f.tar.bz2 | |
rs6000: Generates permute index directly for little endian targets (PR100866)
2022-10-11 Haochen Gui <guihaoc@linux.ibm.com>
gcc/
PR target/100866
* config/rs6000/rs6000-call.cc (swap_endian_selector_for_mode):
Generate permute index directly for little endian targets.
* config/rs6000/vsx.md (revb_<mode>): Call vprem directly with
corresponding permute indexes.
gcc/testsuite/
PR target/100866
* gcc.target/powerpc/pr100866-1.c: New.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/rs6000/rs6000-call.cc | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr100866-1.c | 11 |
3 files changed, 20 insertions, 3 deletions
diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index 6da4de6..c2a4e4f 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -2802,6 +2802,8 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, return build_va_arg_indirect_ref (addr); } +/* The selector (perm) is expected to be used with vperm direct as the + function generates reversed perm for little endian with this patch. */ rtx swap_endian_selector_for_mode (machine_mode mode) { @@ -2834,7 +2836,11 @@ swap_endian_selector_for_mode (machine_mode mode) } for (i = 0; i < 16; ++i) - perm[i] = GEN_INT (swaparray[i]); + if (BYTES_BIG_ENDIAN) + perm[i] = GEN_INT (swaparray[i]); + else + /* Generates the reversed perm for little endian. */ + perm[i] = GEN_INT (~swaparray[i] & 0x0000001f); return force_reg (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm))); diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index fb5cf04..992fbc9 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -6099,8 +6099,8 @@ to the endian mode in use, i.e. in LE mode, put elements in BE order. */ rtx sel = swap_endian_selector_for_mode (<MODE>mode); - emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1], - operands[1], sel)); + emit_insn (gen_altivec_vperm_<mode>_direct (operands[0], operands[1], + operands[1], sel)); } } diff --git a/gcc/testsuite/gcc.target/powerpc/pr100866-1.c b/gcc/testsuite/gcc.target/powerpc/pr100866-1.c new file mode 100644 index 0000000..63872f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr100866-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */ +/* { dg-final { scan-assembler-not {\mxxlnor\M} } } */ + +#include <altivec.h> + +vector unsigned int revb (vector unsigned int a) +{ + return vec_revb(a); +} |