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authorJames Greenhalgh <james.greenhalgh@arm.com>2014-04-23 16:37:05 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2014-04-23 16:37:05 +0000
commit984c2f30636fcc1decc552001660b216a54c80d2 (patch)
treec429cb74616686c57eb1c95525b2cdaddf5896e4 /gcc
parent18b42b2a9c7b632653801344329076b934861930 (diff)
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[ARM] Initialize new tune_params values
gcc/ * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields. (arm_cortex_a12_tune): Likewise. From-SVN: r209710
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.c6
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 99f4b0d..021427b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
+ (arm_cortex_a12_tune): Likewise.
+
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8491763..14dd901 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1781,7 +1781,8 @@ const struct tune_params arm_cortex_a57_tune =
true, /* Prefer LDRD/STRD. */
{true, true}, /* Prefer non short circuit. */
&arm_default_vec_cost, /* Vectorizer costs. */
- false /* Prefer Neon for 64-bits bitops. */
+ false, /* Prefer Neon for 64-bits bitops. */
+ true, true /* Prefer 32-bit encodings. */
};
/* Branches can be dual-issued on Cortex-A5, so conditional execution is
@@ -1834,7 +1835,8 @@ const struct tune_params arm_cortex_a12_tune =
true, /* Prefer LDRD/STRD. */
{true, true}, /* Prefer non short circuit. */
&arm_default_vec_cost, /* Vectorizer costs. */
- false /* Prefer Neon for 64-bits bitops. */
+ false, /* Prefer Neon for 64-bits bitops. */
+ false, false /* Prefer 32-bit encodings. */
};
/* armv7m tuning. On Cortex-M4 cores for example, MOVW/MOVT take a single