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author | Robin Dapp <rdapp@ventanamicro.com> | 2024-08-20 14:02:09 +0200 |
---|---|---|
committer | Robin Dapp <rdapp@ventanamicro.com> | 2024-08-23 11:36:05 +0200 |
commit | 96fe95bac67c7303dc811c04f5e99cc959a7182a (patch) | |
tree | a0548a2bf04a8a44fff7bc53671e895d876db887 /gcc | |
parent | c22d57cdc52d990eb7d353fa82c67882bc824d40 (diff) | |
download | gcc-96fe95bac67c7303dc811c04f5e99cc959a7182a.zip gcc-96fe95bac67c7303dc811c04f5e99cc959a7182a.tar.gz gcc-96fe95bac67c7303dc811c04f5e99cc959a7182a.tar.bz2 |
optabs-query: Use opt_machine_mode for smallest_int_mode_for_size [PR115495].
In get_best_extraction_insn we use smallest_int_mode_for_size with
struct_bits as size argument. PR115495 has struct_bits = 256 and we
don't have a mode for that. This patch makes smallest_mode_for_size
and smallest_int_mode_for_size return opt modes so we can just skip
over the loop when there is no mode.
PR middle-end/115495
gcc/ChangeLog:
* cfgexpand.cc (expand_debug_expr): Require mode.
* combine.cc (make_extraction): Ditto.
* config/aarch64/aarch64.cc (aarch64_expand_cpymem): Ditto.
(aarch64_expand_setmem): Ditto.
* config/arc/arc.cc (arc_expand_cpymem): Ditto.
* config/arm/arm.cc (arm_expand_divmod_libfunc): Ditto.
* config/i386/i386.cc (ix86_get_mask_mode): Ditto.
* config/rs6000/predicates.md: Ditto.
* config/rs6000/rs6000.cc (vspltis_constant): Ditto.
* config/s390/s390.cc (s390_expand_insv): Ditto.
* config/sparc/sparc.cc (assign_int_registers): Ditto.
* coverage.cc (get_gcov_type): Ditto.
(get_gcov_unsigned_t): Ditto.
* dse.cc (find_shift_sequence): Ditto.
* expmed.cc (store_integral_bit_field): Ditto.
* expr.cc (convert_mode_scalar): Ditto.
(op_by_pieces_d::smallest_fixed_size_mode_for_size): Ditto.
(emit_block_move_via_oriented_loop): Ditto.
(copy_blkmode_to_reg): Ditto.
(store_field): Ditto.
* internal-fn.cc (expand_arith_overflow): Ditto.
* machmode.h (HAVE_MACHINE_MODES): Ditto.
(smallest_mode_for_size): Use opt_machine_mode.
(smallest_int_mode_for_size): Use opt_scalar_int_mode.
* optabs-query.cc (get_best_extraction_insn): Require mode.
* optabs.cc (expand_twoval_binop_libfunc): Ditto.
* stor-layout.cc (smallest_mode_for_size): Return
opt_machine_mode.
(layout_type): Require mode.
(initialize_sizetypes): Ditto.
* tree-ssa-loop-manip.cc (canonicalize_loop_ivs): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr115495.c: New test.
gcc/ada/ChangeLog:
* gcc-interface/utils2.cc (fast_modulo_reduction): Require mode.
(nonbinary_modular_operation): Ditto.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ada/gcc-interface/utils2.cc | 5 | ||||
-rw-r--r-- | gcc/cfgexpand.cc | 2 | ||||
-rw-r--r-- | gcc/combine.cc | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.cc | 6 | ||||
-rw-r--r-- | gcc/config/arc/arc.cc | 2 | ||||
-rw-r--r-- | gcc/config/arm/arm.cc | 2 | ||||
-rw-r--r-- | gcc/config/i386/i386.cc | 4 | ||||
-rw-r--r-- | gcc/config/rs6000/predicates.md | 2 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.cc | 2 | ||||
-rw-r--r-- | gcc/config/s390/s390.cc | 2 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.cc | 2 | ||||
-rw-r--r-- | gcc/coverage.cc | 5 | ||||
-rw-r--r-- | gcc/dse.cc | 3 | ||||
-rw-r--r-- | gcc/expmed.cc | 3 | ||||
-rw-r--r-- | gcc/expr.cc | 17 | ||||
-rw-r--r-- | gcc/internal-fn.cc | 4 | ||||
-rw-r--r-- | gcc/machmode.h | 10 | ||||
-rw-r--r-- | gcc/optabs-query.cc | 1 | ||||
-rw-r--r-- | gcc/optabs.cc | 3 | ||||
-rw-r--r-- | gcc/stor-layout.cc | 16 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115495.c | 9 | ||||
-rw-r--r-- | gcc/tree-ssa-loop-manip.cc | 2 |
22 files changed, 62 insertions, 42 deletions
diff --git a/gcc/ada/gcc-interface/utils2.cc b/gcc/ada/gcc-interface/utils2.cc index 0d7e03e..8eebf59 100644 --- a/gcc/ada/gcc-interface/utils2.cc +++ b/gcc/ada/gcc-interface/utils2.cc @@ -661,7 +661,7 @@ fast_modulo_reduction (tree op, tree modulus, unsigned int precision) if (type_precision < BITS_PER_WORD) { const scalar_int_mode m - = smallest_int_mode_for_size (type_precision + 1); + = smallest_int_mode_for_size (type_precision + 1).require (); tree new_type = gnat_type_for_mode (m, 1); op = fold_convert (new_type, op); modulus = fold_convert (new_type, modulus); @@ -721,7 +721,8 @@ nonbinary_modular_operation (enum tree_code op_code, tree type, tree lhs, for its mode since operations are ultimately performed in the mode. */ if (TYPE_PRECISION (type) < precision) { - const scalar_int_mode m = smallest_int_mode_for_size (precision); + const scalar_int_mode m + = smallest_int_mode_for_size (precision).require (); op_type = gnat_type_for_mode (m, 1); modulus = fold_convert (op_type, modulus); lhs = fold_convert (op_type, lhs); diff --git a/gcc/cfgexpand.cc b/gcc/cfgexpand.cc index dad3ae1..13f8c08 100644 --- a/gcc/cfgexpand.cc +++ b/gcc/cfgexpand.cc @@ -4867,7 +4867,7 @@ expand_debug_expr (tree exp) if (maybe_gt (bitsize, MAX_BITSIZE_MODE_ANY_INT)) return NULL; /* Bitfield. */ - mode1 = smallest_int_mode_for_size (bitsize); + mode1 = smallest_int_mode_for_size (bitsize).require (); } poly_int64 bytepos = bits_to_bytes_round_down (bitpos); if (maybe_ne (bytepos, 0)) diff --git a/gcc/combine.cc b/gcc/combine.cc index 3b50bc3..40e9294 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -7799,7 +7799,7 @@ make_extraction (machine_mode mode, rtx inner, HOST_WIDE_INT pos, { /* Be careful not to go beyond the extracted object and maintain the natural alignment of the memory. */ - wanted_inner_mode = smallest_int_mode_for_size (len); + wanted_inner_mode = smallest_int_mode_for_size (len).require (); while (pos % GET_MODE_BITSIZE (wanted_inner_mode) + len > GET_MODE_BITSIZE (wanted_inner_mode)) wanted_inner_mode = GET_MODE_WIDER_MODE (wanted_inner_mode).require (); diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index 69afcc6..40dacfc 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -26760,7 +26760,8 @@ aarch64_expand_cpymem (rtx *operands, bool is_memmove) (when !STRICT_ALIGNMENT) - this is smaller and faster. */ if (size > 0 && size < 16 && !STRICT_ALIGNMENT) { - next_mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT); + next_mode = smallest_mode_for_size + (size * BITS_PER_UNIT, MODE_INT).require (); int n_bytes = GET_MODE_SIZE (next_mode).to_constant (); gcc_assert (n_bytes <= mode_bytes); offset -= n_bytes - size; @@ -26871,7 +26872,8 @@ aarch64_expand_setmem (rtx *operands) (when !STRICT_ALIGNMENT) - this is smaller and faster. */ if (len > 0 && len < 16 && !STRICT_ALIGNMENT) { - next_mode = smallest_mode_for_size (len * BITS_PER_UNIT, MODE_INT); + next_mode = smallest_mode_for_size + (len * BITS_PER_UNIT, MODE_INT).require (); int n_bytes = GET_MODE_SIZE (next_mode).to_constant (); gcc_assert (n_bytes <= mode_bytes); offset -= n_bytes - len; diff --git a/gcc/config/arc/arc.cc b/gcc/config/arc/arc.cc index 686de0f..c800226 100644 --- a/gcc/config/arc/arc.cc +++ b/gcc/config/arc/arc.cc @@ -9157,7 +9157,7 @@ arc_expand_cpymem (rtx *operands) while (piece > size) piece >>= 1; - mode = smallest_int_mode_for_size (piece * BITS_PER_UNIT); + mode = smallest_int_mode_for_size (piece * BITS_PER_UNIT).require (); /* If we don't re-use temporaries, the scheduler gets carried away, and the register pressure gets unnecessarily high. */ if (0 && tmpx[i] && GET_MODE (tmpx[i]) == mode) diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 92cd168..d54564a 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -34332,7 +34332,7 @@ arm_expand_divmod_libfunc (rtx libfunc, machine_mode mode, gcc_assert (!TARGET_IDIV); scalar_int_mode libval_mode - = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode)); + = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode)).require (); rtx libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, libval_mode, op0, mode, op1, mode); diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index d06e214..224a78c 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -24637,11 +24637,11 @@ ix86_get_mask_mode (machine_mode data_mode) if (elem_size == 4 || elem_size == 8 || (TARGET_AVX512BW && (elem_size == 1 || elem_size == 2))) - return smallest_int_mode_for_size (nunits); + return smallest_int_mode_for_size (nunits).require (); } scalar_int_mode elem_mode - = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT); + = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT).require (); gcc_assert (elem_size * nunits == vector_size); diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index cdfd400..7f0b4ab 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -796,7 +796,7 @@ elt += (BYTES_BIG_ENDIAN ? -1 : 1) * (sz - isz) / isz; } else if (isz > sz) - inner = smallest_int_mode_for_size (sz * BITS_PER_UNIT); + inner = smallest_int_mode_for_size (sz * BITS_PER_UNIT).require (); val = const_vector_elt_as_int (op, elt); return EASY_VECTOR_MSB (val, inner); }) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index f2bd9ed..94c0db4 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -6261,7 +6261,7 @@ vspltis_constant (rtx op, unsigned step, unsigned copies) | (small_val & mask))) return false; splat_val = small_val; - inner = smallest_int_mode_for_size (bitsize); + inner = smallest_int_mode_for_size (bitsize).require (); } /* Check if SPLAT_VAL can really be the operand of a vspltis[bhw]. */ diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc index 7aea776..47e1d5a 100644 --- a/gcc/config/s390/s390.cc +++ b/gcc/config/s390/s390.cc @@ -7042,7 +7042,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) return true; } - smode = smallest_int_mode_for_size (bitsize); + smode = smallest_int_mode_for_size (bitsize).require (); smode_bsize = GET_MODE_BITSIZE (smode); mode_bsize = GET_MODE_BITSIZE (mode); diff --git a/gcc/config/sparc/sparc.cc b/gcc/config/sparc/sparc.cc index 9282fb4..3a4c13a 100644 --- a/gcc/config/sparc/sparc.cc +++ b/gcc/config/sparc/sparc.cc @@ -7163,7 +7163,7 @@ assign_int_registers (int bitpos, assign_data_t *data) at the moment but may wish to revisit. */ if (intoffset % BITS_PER_WORD != 0) mode = smallest_int_mode_for_size (BITS_PER_WORD - - intoffset % BITS_PER_WORD); + - intoffset % BITS_PER_WORD).require (); else mode = word_mode; diff --git a/gcc/coverage.cc b/gcc/coverage.cc index f60d1ac..2277836 100644 --- a/gcc/coverage.cc +++ b/gcc/coverage.cc @@ -138,7 +138,8 @@ tree get_gcov_type (void) { scalar_int_mode mode - = smallest_int_mode_for_size (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32); + = smallest_int_mode_for_size + (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32).require (); return lang_hooks.types.type_for_mode (mode, false); } @@ -147,7 +148,7 @@ get_gcov_type (void) static tree get_gcov_unsigned_t (void) { - scalar_int_mode mode = smallest_int_mode_for_size (32); + scalar_int_mode mode = smallest_int_mode_for_size (32).require (); return lang_hooks.types.type_for_mode (mode, true); } @@ -1737,7 +1737,8 @@ find_shift_sequence (poly_int64 access_size, if (store_info->const_rhs && known_le (access_size, GET_MODE_SIZE (MAX_MODE_INT))) { - auto new_mode = smallest_int_mode_for_size (access_size * BITS_PER_UNIT); + auto new_mode = smallest_int_mode_for_size + (access_size * BITS_PER_UNIT).require (); auto byte = subreg_lowpart_offset (new_mode, store_mode); rtx ret = simplify_subreg (new_mode, store_info->const_rhs, store_mode, byte); diff --git a/gcc/expmed.cc b/gcc/expmed.cc index 2ca93e3..4498f9f 100644 --- a/gcc/expmed.cc +++ b/gcc/expmed.cc @@ -972,7 +972,8 @@ store_integral_bit_field (rtx op0, opt_scalar_int_mode op0_mode, objects are meant to be handled before calling this function. */ fixed_size_mode value_mode = as_a <fixed_size_mode> (GET_MODE (value)); if (value_mode == VOIDmode) - value_mode = smallest_int_mode_for_size (nwords * BITS_PER_WORD); + value_mode + = smallest_int_mode_for_size (nwords * BITS_PER_WORD).require (); last = get_last_insn (); for (int i = 0; i < nwords; i++) diff --git a/gcc/expr.cc b/gcc/expr.cc index 2089c2b..8d17a5a 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -596,7 +596,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp) if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT) { scalar_int_mode full_mode - = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode)); + = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode)).require (); gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode) != CODE_FOR_nothing); @@ -611,7 +611,7 @@ convert_mode_scalar (rtx to, rtx from, int unsignedp) { rtx new_from; scalar_int_mode full_mode - = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode)); + = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode)).require (); convert_optab ctab = unsignedp ? zext_optab : sext_optab; enum insn_code icode; @@ -1492,7 +1492,7 @@ op_by_pieces_d::smallest_fixed_size_mode_for_size (unsigned int size) } } - return smallest_int_mode_for_size (size * BITS_PER_UNIT); + return smallest_int_mode_for_size (size * BITS_PER_UNIT).require (); } /* This function contains the main loop used for expanding a block @@ -2385,10 +2385,10 @@ emit_block_move_via_oriented_loop (rtx x, rtx y, rtx size, if (mode != GET_MODE (y_addr)) { scalar_int_mode xmode - = smallest_int_mode_for_size (GET_MODE_BITSIZE (mode)); + = smallest_int_mode_for_size (GET_MODE_BITSIZE (mode)).require (); scalar_int_mode ymode = smallest_int_mode_for_size (GET_MODE_BITSIZE - (GET_MODE (y_addr))); + (GET_MODE (y_addr))).require (); if (GET_MODE_BITSIZE (xmode) < GET_MODE_BITSIZE (ymode)) mode = ymode; else @@ -3667,7 +3667,7 @@ copy_blkmode_to_reg (machine_mode mode_in, tree src) n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; dst_words = XALLOCAVEC (rtx, n_regs); bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); - min_mode = smallest_int_mode_for_size (bitsize); + min_mode = smallest_int_mode_for_size (bitsize).require (); /* Copy the structure BITSIZE bits at a time. */ for (bitpos = 0, xbitpos = padding_correction; @@ -8205,7 +8205,8 @@ store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos, HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); machine_mode temp_mode = GET_MODE (temp); if (temp_mode == BLKmode || temp_mode == VOIDmode) - temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT); + temp_mode + = smallest_int_mode_for_size (size * BITS_PER_UNIT).require (); rtx temp_target = gen_reg_rtx (temp_mode); emit_group_store (temp_target, temp, TREE_TYPE (exp), size); temp = temp_target; @@ -8279,7 +8280,7 @@ store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos, word size, we need to load the value (see again store_bit_field). */ if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD)) { - temp_mode = smallest_int_mode_for_size (bitsize); + temp_mode = smallest_int_mode_for_size (bitsize).require (); temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode, temp_mode, false, NULL); } diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc index 966594a..a96e61e 100644 --- a/gcc/internal-fn.cc +++ b/gcc/internal-fn.cc @@ -2824,7 +2824,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) if (orig_precres == precres && precop <= BITS_PER_WORD) { int p = MAX (min_precision, precop); - scalar_int_mode m = smallest_int_mode_for_size (p); + scalar_int_mode m = smallest_int_mode_for_size (p).require (); tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m), uns0_p && uns1_p && unsr_p); @@ -2867,7 +2867,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt) if (orig_precres == precres) { int p = MAX (prec0, prec1); - scalar_int_mode m = smallest_int_mode_for_size (p); + scalar_int_mode m = smallest_int_mode_for_size (p).require (); tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m), uns0_p && uns1_p && unsr_p); diff --git a/gcc/machmode.h b/gcc/machmode.h index c31ec2f..4c2a8d9 100644 --- a/gcc/machmode.h +++ b/gcc/machmode.h @@ -905,15 +905,15 @@ decimal_float_mode_for_size (unsigned int size) (mode_for_size (size, MODE_DECIMAL_FLOAT, 0)); } -extern machine_mode smallest_mode_for_size (poly_uint64, enum mode_class); +extern opt_machine_mode smallest_mode_for_size (poly_uint64, enum mode_class); -/* Find the narrowest integer mode that contains at least SIZE bits. - Such a mode must exist. */ +/* Find the narrowest integer mode that contains at least SIZE bits, + if such a mode exists. */ -inline scalar_int_mode +inline opt_scalar_int_mode smallest_int_mode_for_size (poly_uint64 size) { - return as_a <scalar_int_mode> (smallest_mode_for_size (size, MODE_INT)); + return dyn_cast <scalar_int_mode> (smallest_mode_for_size (size, MODE_INT)); } extern opt_scalar_int_mode int_mode_for_mode (machine_mode); diff --git a/gcc/optabs-query.cc b/gcc/optabs-query.cc index 5149de5..c3134d6 100644 --- a/gcc/optabs-query.cc +++ b/gcc/optabs-query.cc @@ -205,6 +205,7 @@ get_best_extraction_insn (extraction_insn *insn, machine_mode field_mode) { opt_scalar_int_mode mode_iter; + FOR_EACH_MODE_FROM (mode_iter, smallest_int_mode_for_size (struct_bits)) { scalar_int_mode mode = mode_iter.require (); diff --git a/gcc/optabs.cc b/gcc/optabs.cc index 185c5b1..ded9cc3 100644 --- a/gcc/optabs.cc +++ b/gcc/optabs.cc @@ -2551,7 +2551,8 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1, /* The value returned by the library function will have twice as many bits as the nominal MODE. */ - libval_mode = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode)); + libval_mode + = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode)).require (); start_sequence (); libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST, libval_mode, diff --git a/gcc/stor-layout.cc b/gcc/stor-layout.cc index 0ff8bd1..2e6b826 100644 --- a/gcc/stor-layout.cc +++ b/gcc/stor-layout.cc @@ -339,9 +339,9 @@ mode_for_size_tree (const_tree size, enum mode_class mclass, int limit) } /* Return the narrowest mode of class MCLASS that contains at least - SIZE bits. Abort if no such mode exists. */ + SIZE bits, if such a mode exists. */ -machine_mode +opt_machine_mode smallest_mode_for_size (poly_uint64 size, enum mode_class mclass) { machine_mode mode = VOIDmode; @@ -353,7 +353,8 @@ smallest_mode_for_size (poly_uint64 size, enum mode_class mclass) if (known_ge (GET_MODE_PRECISION (mode), size)) break; - gcc_assert (mode != VOIDmode); + if (mode == VOIDmode) + return opt_machine_mode (); if (mclass == MODE_INT || mclass == MODE_PARTIAL_INT) for (i = 0; i < NUM_INT_N_ENTS; i ++) @@ -2460,7 +2461,7 @@ layout_type (tree type) case ENUMERAL_TYPE: { scalar_int_mode mode - = smallest_int_mode_for_size (TYPE_PRECISION (type)); + = smallest_int_mode_for_size (TYPE_PRECISION (type)).require (); SET_TYPE_MODE (type, mode); TYPE_SIZE (type) = bitsize_int (GET_MODE_BITSIZE (mode)); /* Don't set TYPE_PRECISION here, as it may be set by a bitfield. */ @@ -2936,7 +2937,8 @@ initialize_sizetypes (void) bprecision = MIN (precision + LOG2_BITS_PER_UNIT + 1, MAX_FIXED_MODE_SIZE); - bprecision = GET_MODE_PRECISION (smallest_int_mode_for_size (bprecision)); + bprecision + = GET_MODE_PRECISION (smallest_int_mode_for_size (bprecision).require ()); if (bprecision > HOST_BITS_PER_DOUBLE_INT) bprecision = HOST_BITS_PER_DOUBLE_INT; @@ -2951,14 +2953,14 @@ initialize_sizetypes (void) TYPE_UNSIGNED (bitsizetype) = 1; /* Now layout both types manually. */ - scalar_int_mode mode = smallest_int_mode_for_size (precision); + scalar_int_mode mode = smallest_int_mode_for_size (precision).require (); SET_TYPE_MODE (sizetype, mode); SET_TYPE_ALIGN (sizetype, GET_MODE_ALIGNMENT (TYPE_MODE (sizetype))); TYPE_SIZE (sizetype) = bitsize_int (precision); TYPE_SIZE_UNIT (sizetype) = size_int (GET_MODE_SIZE (mode)); set_min_and_max_values_for_integral_type (sizetype, precision, UNSIGNED); - mode = smallest_int_mode_for_size (bprecision); + mode = smallest_int_mode_for_size (bprecision).require (); SET_TYPE_MODE (bitsizetype, mode); SET_TYPE_ALIGN (bitsizetype, GET_MODE_ALIGNMENT (TYPE_MODE (bitsizetype))); TYPE_SIZE (bitsizetype) = bitsize_int (bprecision); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115495.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115495.c new file mode 100644 index 0000000..bbf4d72 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115495.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3" } */ + +extern short a[]; +short b; +int main() { + for (char c = 0; c < 18; c += 1) + a[c + 0] = b; +} diff --git a/gcc/tree-ssa-loop-manip.cc b/gcc/tree-ssa-loop-manip.cc index 6cef1ae..213f069 100644 --- a/gcc/tree-ssa-loop-manip.cc +++ b/gcc/tree-ssa-loop-manip.cc @@ -1426,7 +1426,7 @@ canonicalize_loop_ivs (class loop *loop, tree *nit, bool bump_in_latch) precision = TYPE_PRECISION (type); } - scalar_int_mode mode = smallest_int_mode_for_size (precision); + scalar_int_mode mode = smallest_int_mode_for_size (precision).require (); precision = GET_MODE_PRECISION (mode); type = build_nonstandard_integer_type (precision, unsigned_p); |