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| author | Bu Le <bule1@huawei.com> | 2020-08-03 16:38:46 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-08-03 16:38:46 +0100 |
| commit | 9623f61b142174b87760c81f78928dd14af7cbc6 (patch) | |
| tree | b381d60f76a81b5e84e9d1353ee8305acc1fb9ad /gcc | |
| parent | 401070d8b4e90d4363b6566836c94ec7b6f9c5a2 (diff) | |
| download | gcc-9623f61b142174b87760c81f78928dd14af7cbc6.zip gcc-9623f61b142174b87760c81f78928dd14af7cbc6.tar.gz gcc-9623f61b142174b87760c81f78928dd14af7cbc6.tar.bz2 | |
aarch64: Add support for unpacked sub [PR96366]
The test case bb-slp-20.c in the gcc testsuit will cause an
ICE in the expand pass due to the lack of a pattern for
subtraction of the VNx2SI mode. This patch solve this problem
by adding support for unpacked sub.
gcc/ChangeLog:
* config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
unpacked vectors.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64-sve.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 9d06bf7..182813c 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3644,10 +3644,10 @@ ;; ------------------------------------------------------------------------- (define_insn "sub<mode>3" - [(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w") - (minus:SVE_FULL_I - (match_operand:SVE_FULL_I 1 "aarch64_sve_arith_operand" "w, vsa, vsa") - (match_operand:SVE_FULL_I 2 "register_operand" "w, 0, w")))] + [(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w") + (minus:SVE_I + (match_operand:SVE_I 1 "aarch64_sve_arith_operand" "w, vsa, vsa") + (match_operand:SVE_I 2 "register_operand" "w, 0, w")))] "TARGET_SVE" "@ sub\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype> |