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| author | Michael Meissner <meissner@linux.ibm.com> | 2021-08-27 13:19:54 -0400 |
|---|---|---|
| committer | Michael Meissner <meissner@linux.ibm.com> | 2021-08-27 13:19:54 -0400 |
| commit | 94a047359f84c7ea5ade378028852b19529a7495 (patch) | |
| tree | 843072ecf397fb3c8e11f648441c52637c29503f /gcc | |
| parent | 66526c6a1c01b6110eaeda94ecc885177c636605 (diff) | |
| download | gcc-94a047359f84c7ea5ade378028852b19529a7495.zip gcc-94a047359f84c7ea5ade378028852b19529a7495.tar.gz gcc-94a047359f84c7ea5ade378028852b19529a7495.tar.bz2 | |
Fix float128-call.c test for power8 IEEE 128 and power10.
I built a compiler on a little endian power8 system where the default long
double was IEEE 128-bit instead of IBM 128-bit. I discovered that on
power8, we would generate a lxvd2x and xxpermdi to deal with the endianess
instead of the Altivec lxv.
In addition, I noticed the constant that was being loaded (1.0q) could be
loaded by the lxvkq instruction.
I rewrote the test to handle all forms of vector load and store that can
be generated.
2021-08-27 Michael Meissner <meissner@linux.ibm.com>
gcc/testsuite/
* gcc.target/powerpc/float128-call.c: Fix test for IEEE 128-bit
long double and power10.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/float128-call.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-call.c b/gcc/testsuite/gcc.target/powerpc/float128-call.c index b64ffc6..44b242b 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-call.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-call.c @@ -6,22 +6,33 @@ #error "-mfloat128 is not supported." #endif +/* Pick a constant to load that cannot be generated by the power10 lxvkq + instruction. */ #ifdef __LONG_DOUBLE_IEEE128__ #define TYPE long double -#define ONE 1.0L +#define TEN 10.0L #else #define TYPE __float128 -#define ONE 1.0Q +#define TEN 10.0Q #endif /* Test to make sure vector registers are used for passing IEEE 128-bit floating point values and returning them. Also make sure the 'q' suffix is - handled. */ -TYPE one (void) { return ONE; } + handled for __float128. */ +TYPE one (void) { return TEN; } void store (TYPE a, TYPE *p) { *p = a; } -/* { dg-final { scan-assembler {\mlxvd2x 34\M} {target be} } } */ -/* { dg-final { scan-assembler {\mstxvd2x 34\M} {target be} } } */ -/* { dg-final { scan-assembler {\mlvx 2\M} {target le} } } */ -/* { dg-final { scan-assembler {\mstvx 2\M} {target le} } } */ +/* This regexp captures the different vector load/stores that can be generated: + + lxvd2x -- big endian power7/power8, little endian power8 + lvx -- Altivec + lxv -- power9 + plxv -- power10 + lxvx -- X-form variant. + stxvd2x -- big endian power7/power8, little endian power8 + stvx -- Altivec + stxvx -- power9/power10. */ + +/* { dg-final { scan-assembler {\mlxvd2x 34\M|\mlvx 2\M|\mp?lxvx? 34\M} } } */ +/* { dg-final { scan-assembler {\mstxvd2x 34\M|\mstvx 2\M|\mstxvx 34\M} } } */ |