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authorWill Schmidt <will_schmidt@vnet.ibm.com>2020-10-23 17:28:17 -0500
committerWill Schmidt <will_schmidt@vnet.ibm.com>2021-01-29 11:34:59 -0600
commit91a95ad2ae0e0f2fa953fafe55ff2ec32c8277d5 (patch)
treef00a6fb4f2923d80c59fb17fd0370ce8ecd882b1 /gcc
parent83bdc9f70347e6438822e719c30c3793c81df18e (diff)
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[PATCH, rs6000] improve vec_ctf invalid parameter handling.
Hi, Per PR91903, GCC ICEs when we attempt to pass a variable (or out of range value) into the vec_ctf() builtin. Per investigation, the parameter checking exists for this builtin with the int types, but was missing for the long long types. This problem also occurs for the vec_cts() builtin, which is also fixed by this patch. This patch adds the missing CODE_FOR_* entries to the rs6000_expand_binup_builtin to cover that scenario. This patch also updates some existing tests to remove calls to vec_ctf() and vec_cts() that contain negative values. PR target/91903 2020-01-29 Will Schmidt <will_schmidt@vnet.ibm.com> gcc/ChangeLog: * config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add clauses for CODE_FOR_vsx_xvcvuxddp_scale and CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr91903.c: New test. * gcc.target/powerpc/builtins-1.fold.h: Update. * gcc.target/powerpc/builtins-2.c: Update.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/rs6000-call.c4
-rw-r--r--gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h4
-rw-r--r--gcc/testsuite/gcc.target/powerpc/builtins-2.c6
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr91903.c73
4 files changed, 81 insertions, 6 deletions
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index ae0c761..de0ce50 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -9564,7 +9564,9 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
else if (icode == CODE_FOR_altivec_vcfux
|| icode == CODE_FOR_altivec_vcfsx
|| icode == CODE_FOR_altivec_vctsxs
- || icode == CODE_FOR_altivec_vctuxs)
+ || icode == CODE_FOR_altivec_vctuxs
+ || icode == CODE_FOR_vsx_xvcvuxddp_scale
+ || icode == CODE_FOR_vsx_xvcvsxddp_scale)
{
/* Only allow 5-bit unsigned literals. */
STRIP_NOPS (arg1);
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h b/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
index 8bc5f5e..42d5522 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.fold.h
@@ -214,10 +214,10 @@ int main ()
extern vector long long l8; l8 = vec_mul (l3, l4);
extern vector unsigned long long u6; u6 = vec_mul (u3, u4);
- extern vector double dh; dh = vec_ctf (la, -2);
+ extern vector double dh; dh = vec_ctf (la, 2);
extern vector double di; di = vec_ctf (ua, 2);
extern vector int sz; sz = vec_cts (fa, 0x1F);
- extern vector long long l9; l9 = vec_cts (dh, -2);
+ extern vector long long l9; l9 = vec_cts (dh, 2);
extern vector unsigned long long u7; u7 = vec_ctu (di, 2);
extern vector unsigned int usz; usz = vec_ctu (fa, 0x1F);
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-2.c b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
index 2aa23a3..30acae4 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-2.c
@@ -42,12 +42,12 @@ int main ()
|| ue[0] != 27L || ue[1] != 27L || uf[0] != 14L || uf[1] != 14L)
abort ();
- vector double da = vec_ctf (sa, -2);
+ vector double da = vec_ctf (sa, 2);
vector double db = vec_ctf (ua, 2);
- vector long long sg = vec_cts (da, -2);
+ vector long long sg = vec_cts (da, 2);
vector unsigned long long ug = vec_ctu (db, 2);
- if (da[0] != 108.0 || da[1] != -56.0 || db[0] != 6.75 || db[1] != 3.5
+ if (da[0] != 6.75 || da[1] != -3.5 || db[0] != 6.75 || db[1] != 3.5
|| sg[0] != 27L || sg[1] != -14L || ug[0] != 27L || ug[1] != 14L)
abort ();
diff --git a/gcc/testsuite/gcc.target/powerpc/pr91903.c b/gcc/testsuite/gcc.target/powerpc/pr91903.c
new file mode 100644
index 0000000..efd217e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr91903.c
@@ -0,0 +1,73 @@
+/* { dg-do compile */
+/* { dg-require-effective-target p8vector_ok } */
+/* { dg-options "-mdejagnu-cpu=power8" } */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <altivec.h>
+
+vector double retd;
+vector float retf;
+vector signed int retsi;
+
+void test_int(vector signed int a, const int b)
+{
+ retf = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,1);
+ retf = vec_ctf(a,31);
+ retf = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+}
+
+void test_uint(vector unsigned int a, const int b)
+{
+ retf = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,1);
+ retf = vec_ctf(a,31);
+ retf = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retf = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+}
+
+void test_longlong(vector signed long long a, const int b,int x)
+{
+ retd = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,1);
+ retd = vec_ctf(a,31);
+ retd = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+}
+
+void test_ulonglong(vector unsigned long long a, const int b,int x)
+{
+ retd = vec_ctf(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-1); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-31); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,-32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,1);
+ retd = vec_ctf(a,31);
+ retd = vec_ctf(a,32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retd = vec_ctf(a,42); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+}
+
+
+void test_cts_1(vector float a, const int b)
+{
+ retsi = vec_cts(a,b); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retsi = vec_cts(a,-1); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retsi = vec_cts(a,-31); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retsi = vec_cts(a,-32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retsi = vec_cts(a,1);
+ retsi = vec_cts(a,31);
+ retsi = vec_cts(a,32); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+ retsi = vec_cts(a,42); /* { dg-error "argument 2 must be a 5-bit unsigned literal" } */
+}
+