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author | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-07 14:19:03 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2025-08-07 14:19:03 +0100 |
commit | 8e3239e3e92f3cd57bf3a19f10daa66c4cb45cc1 (patch) | |
tree | b3b832fff1c94587cf427dd407b798157205f0c2 /gcc | |
parent | 53f491ccd1e59fad77fb2cb30d1a58b9e5e5f63c (diff) | |
download | gcc-8e3239e3e92f3cd57bf3a19f10daa66c4cb45cc1.zip gcc-8e3239e3e92f3cd57bf3a19f10daa66c4cb45cc1.tar.gz gcc-8e3239e3e92f3cd57bf3a19f10daa66c4cb45cc1.tar.bz2 |
Remove MODE_COMPOSITE_P test from simplify_gen_subreg [PR120718]
simplify_gen_subreg rejected subregs of literal constants if
MODE_COMPOSITE_P. This was added by the fix for PR96648 in
g:c0f772894b6b3cd8ed5c5dd09d0c7917f51cf70f. Jakub said:
As for the simplify_gen_subreg change, I think it would be desirable
to just avoid creating SUBREGs of constants on all targets and for all
constants, if simplify_immed_subreg simplified, fine, otherwise punt,
but as we are late in GCC11 development, the patch instead guards this
behavior on MODE_COMPOSITE_P (outermode) - i.e. only conversions to
powerpc{,64,64le} double double long double - and only for the cases where
simplify_immed_subreg was called.
I'm not sure about relaxing the codes further, since subregs might
be wanted for CONST, SYMBOL_REF and LABEL_REF. But removing the
MODE_COMPOSITE_P is needed to fix PR120718, where we get an ICE
from generating a subreg of a V2SI const_vector.
gcc/
PR rtl-optimization/120718
* simplify-rtx.cc (simplify_context::simplify_gen_subreg):
Remove MODE_COMPOSITE_P condition.
gcc/testsuite/
PR rtl-optimization/120718
* gcc.target/aarch64/sve/acle/general/pr120718.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/simplify-rtx.cc | 12 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr120718.c | 12 |
2 files changed, 16 insertions, 8 deletions
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index c723a07..ee9c048 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -8460,14 +8460,10 @@ simplify_context::simplify_gen_subreg (machine_mode outermode, rtx op, if (GET_CODE (op) == SUBREG || GET_CODE (op) == CONCAT - || GET_MODE (op) == VOIDmode) - return NULL_RTX; - - if (MODE_COMPOSITE_P (outermode) - && (CONST_SCALAR_INT_P (op) - || CONST_DOUBLE_AS_FLOAT_P (op) - || CONST_FIXED_P (op) - || GET_CODE (op) == CONST_VECTOR)) + || CONST_SCALAR_INT_P (op) + || CONST_DOUBLE_AS_FLOAT_P (op) + || CONST_FIXED_P (op) + || GET_CODE (op) == CONST_VECTOR) return NULL_RTX; if (validate_subreg (outermode, innermode, op, byte)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr120718.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr120718.c new file mode 100644 index 0000000..9ca0938 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr120718.c @@ -0,0 +1,12 @@ +/* { dg-options "-O2" } */ + +#include <arm_sve.h> +typedef int __attribute__((vector_size(8))) v2si; +typedef struct { int x; int y; } A; +void bar(A a); +void foo() +{ + A a; + *(v2si *)&a = (v2si){0, (int)svcntd_pat(SV_ALL)}; + bar(a); +} |