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author | Vladimir N. Makarov <vmakarov@redhat.com> | 2025-03-17 15:21:46 -0400 |
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committer | Vladimir N. Makarov <vmakarov@redhat.com> | 2025-03-17 15:25:57 -0400 |
commit | 8e0e17677afc1a93aa31b8b83849848b7bb52b9b (patch) | |
tree | 4b5b55ce69596970015d38069334612b68cf7af2 /gcc | |
parent | 96698551b8e19fc33637908190f121e039301993 (diff) | |
download | gcc-8e0e17677afc1a93aa31b8b83849848b7bb52b9b.zip gcc-8e0e17677afc1a93aa31b8b83849848b7bb52b9b.tar.gz gcc-8e0e17677afc1a93aa31b8b83849848b7bb52b9b.tar.bz2 |
[PR119285][IRA]: Use an additional way of reg equiv invariant substitution correctness
Patch for PR114991 resulted in 5% decrease of SPEC2017 lbm performance
on Zen2 and Zen4. For one RTL insn of lbm, LRA with PR114991 patch
can not confirm that the equivalence insertion will create a valid RTL
insn. This resulted in that the pseudo equiv was assumed costly and
pseudo was assigned to hard reg (caller saved as the pseudo lives
through calls) and some other pseudos did not get hard regs as it was
before PR114991 patch. The insn in question is `pseudo1 = pseduo2 +
pseudo3` where pseudo2 has equiv `hard_reg + const`. The old code
recognized the insn after equiv substitution as LEA. The new code
failed. The patch here makes to use two ways for equiv subsbtitution
correctness, the old one and new one (mostly for memory addresses
where the old code fails to find the substitution correctness). So
given patch fixes lbm performance degradation and actually makes GCC
to generate the same code as it was before PR114991 patch.
gcc/ChangeLog:
PR rtl-optimization/119285
* ira-costs.cc (equiv_can_be_consumed_p): Use 2 ways for
recognizing a valid insn after equiv insertion.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ira-costs.cc | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/gcc/ira-costs.cc b/gcc/ira-costs.cc index b568c7d..70cba94 100644 --- a/gcc/ira-costs.cc +++ b/gcc/ira-costs.cc @@ -1794,29 +1794,28 @@ validate_autoinc_and_mem_addr_p (rtx x) static bool equiv_can_be_consumed_p (int regno, rtx to, rtx_insn *insn, bool invariant_p) { - if (invariant_p) + validate_replace_src_group (regno_reg_rtx[regno], to, insn); + /* We can change register to equivalent memory in autoinc rtl. Some code + including verify_changes assumes that autoinc contains only a register. + So check this first. */ + bool res = validate_autoinc_and_mem_addr_p (PATTERN (insn)); + if (res) + res = verify_changes (0); + cancel_changes (0); + if (!res && invariant_p) { - /* We use more expensive code for the invariant because we need to + /* Here we use more expensive code for the invariant because we need to simplify the result insn as the invariant can be arithmetic rtx - inserted into another arithmetic rtx. */ + inserted into another arithmetic rtx, e.g. into memory address. */ rtx pat = PATTERN (insn); int code = INSN_CODE (insn); PATTERN (insn) = copy_rtx (pat); PATTERN (insn) = simplify_replace_rtx (PATTERN (insn), regno_reg_rtx[regno], to); - bool res = !insn_invalid_p (insn, false); + res = !insn_invalid_p (insn, false); PATTERN (insn) = pat; INSN_CODE (insn) = code; - return res; } - validate_replace_src_group (regno_reg_rtx[regno], to, insn); - /* We can change register to equivalent memory in autoinc rtl. Some code - including verify_changes assumes that autoinc contains only a register. - So check this first. */ - bool res = validate_autoinc_and_mem_addr_p (PATTERN (insn)); - if (res) - res = verify_changes (0); - cancel_changes (0); return res; } |