AVX512FP16: Add testcases for vfcmaddcsh/vfmaddcsh/vfcmulcsh/vfmulcsh.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512fp16-vfcmaddcsh-1a.c: New test.
	* gcc.target/i386/avx512fp16-vfcmaddcsh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vfcmulcsh-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vfcmulcsh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmaddcsh-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmaddcsh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmulcsh-1a.c: Ditto.
	* gcc.target/i386/avx512fp16-vfmulcsh-1b.c: Ditto.
	* gcc.target/i386/avx512fp16-complex-constraints.c: Ditto.

9 files changed, 424 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-complex-constraints.c b/gcc/testsuite/gcc.target/i386/avx512fp16-complex-constraints.c
new file mode 100644
index 0000000..fcd3794
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-complex-constraints.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+
+/* { dg-final { scan-assembler-not "vfmulcph\[ \\t\]+\[^\{\n\]*%zmm1+\[^\n\r]*%zmm0+\[^\n\r]*%zmm0+(?:\n|\[ \\t\]+#)" } } */
+/* { dg-final { scan-assembler-not "vfmaddcph\[ \\t\]+\[^\{\n\]*%zmm0+\[^\n\r]*%zmm0+\[^\n\r]*%zmm0+(?:\n|\[ \\t\]+#)" } } */
+/* { dg-final { scan-assembler-not "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm1+\[^\n\r]*%xmm0+\[^\n\r]*%xmm0+(?:\n|\[ \\t\]+#)" } } */
+/* { dg-final { scan-assembler-not "vfmaddcsh\[ \\t\]+\[^\{\n\]*%xmm0+\[^\n\r]*%xmm0+\[^\n\r]*%xmm0+(?:\n|\[ \\t\]+#)" } } */
+
+#include <immintrin.h>
+
+volatile __m512h a1;
+volatile __m128h a2;
+__m512h b1;
+__m128h b2;
+
+void extern
+avx512f_test (void)
+{
+  a1 = _mm512_fmul_pch (a1, a1);
+  b1 = _mm512_fmadd_pch (b1, b1, b1);
+  a2 = _mm_fmul_sch (a2, a2);
+  b2 = _mm_fmadd_sch (b2, b2, b2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1a.c
new file mode 100644
index 0000000..8bd8eeb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1a.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfcmaddcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, res1, res2;
+volatile __m128h x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx128f_test (void)
+{
+  res = _mm_fcmadd_sch (x1, x2, x3);
+  res1 = _mm_mask_fcmadd_sch (res1, m8, x1, x2);
+  res1 = _mm_mask3_fcmadd_sch (res1, x1, x2, m8);
+  res2 = _mm_maskz_fcmadd_sch (m8, x1, x2, x3);
+  res = _mm_fcmadd_round_sch (x1, x2, x3, 8);
+  res1 = _mm_mask_fcmadd_round_sch (res1, m8, x1, x2, 8);
+  res1 = _mm_mask3_fcmadd_round_sch (res1, x1, x2, m8, 8);
+  res2 = _mm_maskz_fcmadd_round_sch (m8, x1, x2, x3, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1b.c
new file mode 100644
index 0000000..c479068
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmaddcsh-1b.c
@@ -0,0 +1,78 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+EMULATE(c_fmadd_csh) (V512 * dest, V512 op1, V512 op2,
+		    __mmask8 k, int zero_mask, int c_flag,
+		    int is_mask3)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  int invert = 1;
+  if (c_flag == 1)
+    invert = -1;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(op2, &v3, &v4);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  if ((k&1) || !k) {
+    v5.f32[0] = v1.f32[0] * v7.f32[0]
+      - invert * (v1.f32[1] * v7.f32[1]) + v3.f32[0];
+    v5.f32[1] = v1.f32[0] * v7.f32[1]
+      + invert * (v1.f32[1] * v7.f32[0]) + v3.f32[1];
+  }
+  else if (zero_mask)
+    v5.f32[0] = 0;
+  else
+    v5.f32[0] = v7.f32[0];
+
+  for (i = 2; i < 8; i++)
+    v5.f32[i] = is_mask3? v3.f32[i] : v7.f32[i];
+
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 1, 0);
+  res.xmmh[0] = _mm_fcmadd_round_sch(res.xmmh[0], src1.xmmh[0],
+				     src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_fcmadd_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 1, 0);
+  res.xmmh[0] = _mm_mask_fcmadd_round_sch(res.xmmh[0], 0x1,
+					  src1.xmmh[0], src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask_fcmadd_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 1, 1);
+  res.xmmh[0] = _mm_mask3_fcmadd_round_sch(res.xmmh[0], src1.xmmh[0], src2.xmmh[0],
+					   0x1, _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask3_fcmadd_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x3, 1, 1, 0);
+  res.xmmh[0] = _mm_maskz_fcmadd_round_sch(0x3, res.xmmh[0], src1.xmmh[0],
+					   src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_maskz_fcmadd_sch);
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c
new file mode 100644
index 0000000..872d91a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1a.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfcmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, res1, res2;
+volatile __m128h x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_fcmul_sch (x1, x2);
+  res1 = _mm_mask_fcmul_sch (res1, m8, x1, x2);
+  res2 = _mm_maskz_fcmul_sch (m8, x1, x2);
+  res = _mm_fcmul_round_sch (x1, x2, 8);
+  res1 = _mm_mask_fcmul_round_sch (res1, m8, x1, x2, 8);
+  res2 = _mm_maskz_fcmul_round_sch (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1b.c
new file mode 100644
index 0000000..995df84
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfcmulcsh-1b.c
@@ -0,0 +1,71 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+EMULATE(c_fmul_csh) (V512 * dest, V512 op1, V512 op2,
+		    __mmask8 k, int zero_mask, int c_flag)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  int invert = 1;
+  if (c_flag == 1)
+    invert = -1;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(op2, &v3, &v4);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  if ((k&1) || !k) {
+    v5.f32[0] = v1.f32[0] * v3.f32[0]
+      - invert * (v1.f32[1] * v3.f32[1]);
+    v5.f32[1] = v1.f32[1] * v3.f32[0]
+      + invert * (v1.f32[0] * v3.f32[1]);
+  }
+  else if (zero_mask)
+    v5.f32[0] = 0;
+  else
+    v5.f32[0] = v7.f32[0];
+
+  for (i = 2; i < 8; i++)
+    v5.f32[i] = v1.f32[i];
+
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x1, 0 , 1);
+  res.xmmh[0] = _mm_fcmul_round_sch(src1.xmmh[0], src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_fcmul_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x1, 0, 1);
+  res.xmmh[0] = _mm_mask_fcmul_round_sch(res.xmmh[0], 0x1,
+					 src1.xmmh[0], src2.xmmh[0],
+					 _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask_fcmul_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x3, 1, 1);
+  res.xmmh[0] = _mm_maskz_fcmul_round_sch(0x3, src1.xmmh[0],
+					  src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_maskz_fcmul_sch);
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1a.c
new file mode 100644
index 0000000..1e376b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1a.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vfmaddcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, res1, res2;
+volatile __m128h x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx128f_test (void)
+{
+  res = _mm_fmadd_sch (x1, x2, x3);
+  res1 = _mm_mask_fmadd_sch (res1, m8, x1, x2);
+  res1 = _mm_mask3_fmadd_sch (res1, x1, x2, m8);
+  res2 = _mm_maskz_fmadd_sch (m8, x1, x2, x3);
+  res = _mm_fmadd_round_sch (x1, x2, x3, 8);
+  res1 = _mm_mask_fmadd_round_sch (res1, m8, x1, x2, 8);
+  res1 = _mm_mask3_fmadd_round_sch (res1, x1, x2, m8, 8);
+  res2 = _mm_maskz_fmadd_round_sch (m8, x1, x2, x3, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1b.c
new file mode 100644
index 0000000..4c74e01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmaddcsh-1b.c
@@ -0,0 +1,77 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+EMULATE(c_fmadd_csh) (V512 * dest, V512 op1, V512 op2,
+		    __mmask8 k, int zero_mask, int c_flag,
+		    int is_mask3)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  int invert = 1;
+  if (c_flag == 1)
+    invert = -1;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(op2, &v3, &v4);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  if ((k&1) || !k) {
+    v5.f32[0] = v1.f32[0] * v7.f32[0]
+      - invert * (v1.f32[1] * v7.f32[1]) + v3.f32[0];
+    v5.f32[1] = v1.f32[0] * v7.f32[1]
+      + invert * (v1.f32[1] * v7.f32[0]) + v3.f32[1];
+  }
+  else if (zero_mask)
+    v5.f32[0] = 0;
+  else
+    v5.f32[0] = v7.f32[0];
+
+  for (i = 2; i < 8; i++)
+    v5.f32[i] = is_mask3? v3.f32[i] : v7.f32[i];
+
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 0, 0);
+  res.xmmh[0] = _mm_fmadd_round_sch(res.xmmh[0], src1.xmmh[0],
+				    src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_fmadd_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 0, 0);
+  res.xmmh[0] = _mm_mask_fmadd_round_sch(res.xmmh[0], 0x1, src1.xmmh[0],
+					 src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask_fmadd_sch);
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x1, 0, 0, 1);
+  res.xmmh[0] = _mm_mask3_fmadd_round_sch(res.xmmh[0], src1.xmmh[0], src2.xmmh[0],
+					   0x1, _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask3_fmadd_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmadd_csh)(&exp, src1, src2,  0x3, 1, 0, 0);
+  res.xmmh[0] = _mm_maskz_fmadd_round_sch(0x3, res.xmmh[0], src1.xmmh[0],
+					  src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_maskz_fmadd_sch);
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c
new file mode 100644
index 0000000..5d48874
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1a.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfmulcsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, res1, res2;
+volatile __m128h x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_fmul_sch (x1, x2);
+  res1 = _mm_mask_fmul_sch (res1, m8, x1, x2);
+  res2 = _mm_maskz_fmul_sch (m8, x1, x2);
+  res = _mm_fmul_round_sch (x1, x2, 8);
+  res1 = _mm_mask_fmul_round_sch (res1, m8, x1, x2, 8);
+  res2 = _mm_maskz_fmul_round_sch (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1b.c
new file mode 100644
index 0000000..45840d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfmulcsh-1b.c
@@ -0,0 +1,71 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+EMULATE(c_fmul_csh) (V512 * dest, V512 op1, V512 op2,
+		    __mmask8 k, int zero_mask, int c_flag)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  int invert = 1;
+  if (c_flag == 1)
+    invert = -1;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(op2, &v3, &v4);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  if ((k&1) || !k) {
+    v5.f32[0] = v1.f32[0] * v3.f32[0]
+      - invert * (v1.f32[1] * v3.f32[1]);
+    v5.f32[1] = v1.f32[0] * v3.f32[1]
+      + invert * (v1.f32[1] * v3.f32[0]);
+  }
+  else if (zero_mask)
+    v5.f32[0] = 0;
+  else
+    v5.f32[0] = v7.f32[0];
+
+  for (i = 2; i < 8; i++)
+    v5.f32[i] = v1.f32[i];
+
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x1, 0 , 0);
+  res.xmmh[0] = _mm_fmul_round_sch(src1.xmmh[0], src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_fmul_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x1, 0, 0);
+  res.xmmh[0] = _mm_mask_fmul_round_sch(res.xmmh[0], 0x1,
+					src1.xmmh[0], src2.xmmh[0],
+					_ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_mask_fmul_sch);
+
+  init_dest(&res, &exp);
+  EMULATE(c_fmul_csh)(&exp, src1, src2,  0x3, 1, 0);
+  res.xmmh[0] = _mm_maskz_fmul_round_sch(0x3, src1.xmmh[0],
+					 src2.xmmh[0], _ROUND_NINT);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mm_maskz_fmul_sch);
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+