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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2017-03-27 12:56:24 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gcc.gnu.org> | 2017-03-27 12:56:24 +0200 |
| commit | 81b98ef7697900c12d94f7f413613b8139a16624 (patch) | |
| tree | d10aad0096fd2332432285048339e611ababf8b8 /gcc | |
| parent | ac2551850669c3013b1b6e142a167060328ff52d (diff) | |
| download | gcc-81b98ef7697900c12d94f7f413613b8139a16624.zip gcc-81b98ef7697900c12d94f7f413613b8139a16624.tar.gz gcc-81b98ef7697900c12d94f7f413613b8139a16624.tar.bz2 | |
[ARC] Disable TP register when building for bare metal.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/elf.h (ARGET_ARC_TP_REGNO_DEFAULT): Define.
* config/arc/linux.h (ARGET_ARC_TP_REGNO_DEFAULT): Likewise.
* config/arc/arc.opt (mtp-regno): Use ARGET_ARC_TP_REGNO_DEFAULT.
From-SVN: r246497
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arc/arc.opt | 2 | ||||
| -rw-r--r-- | gcc/config/arc/elf.h | 4 | ||||
| -rw-r--r-- | gcc/config/arc/linux.h | 4 |
4 files changed, 15 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 598f03d..2740aa6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2017-03-27 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/elf.h (ARGET_ARC_TP_REGNO_DEFAULT): Define. + * config/arc/linux.h (ARGET_ARC_TP_REGNO_DEFAULT): Likewise. + * config/arc/arc.opt (mtp-regno): Use ARGET_ARC_TP_REGNO_DEFAULT. + +2017-03-27 Claudiu Zissulescu <claziss@synopsys.com> + * config/arc/predicates.md (long_immediate_loadstore_operand): Consider scaled addresses cases. diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index 17af736..6060ded 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -469,7 +469,7 @@ EnumValue Enum(arc_fpu) String(fpud_all) Value(FPU_FPUD_ALL) mtp-regno= -Target RejectNegative Joined UInteger Var(arc_tp_regno) Init(25) +Target RejectNegative Joined UInteger Var(arc_tp_regno) Init(TARGET_ARC_TP_REGNO_DEFAULT) Specify thread pointer register number. mtp-regno=none diff --git a/gcc/config/arc/elf.h b/gcc/config/arc/elf.h index d2106c5..2b572a5 100644 --- a/gcc/config/arc/elf.h +++ b/gcc/config/arc/elf.h @@ -53,3 +53,7 @@ along with GCC; see the file COPYING3. If not see # define MULTILIB_DEFAULTS { "mcpu=" ARC_MULTILIB_CPU_DEFAULT } # endif #endif + +/* Bare-metal toolchains do not need a thread pointer register. */ +#undef TARGET_ARC_TP_REGNO_DEFAULT +#define TARGET_ARC_TP_REGNO_DEFAULT -1 diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h index 10c291c..6e1a96e 100644 --- a/gcc/config/arc/linux.h +++ b/gcc/config/arc/linux.h @@ -74,3 +74,7 @@ along with GCC; see the file COPYING3. If not see /* We do not have any MULTILIB_OPTIONS specified, so there are no MULTILIB_DEFAULTS. */ #undef MULTILIB_DEFAULTS + +/* Linux toolchains use r25 as the thread pointer register. */ +#undef TARGET_ARC_TP_REGNO_DEFAULT +#define TARGET_ARC_TP_REGNO_DEFAULT 25 |